mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 14:16:17 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
159 lines
4.2 KiB
ArmAsm
159 lines
4.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*/
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#include <config.h>
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#ifdef CONFIG_ROM_UNIFIED_SECTIONS
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#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
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#define ROM_VERSION_OFFSET 0x80
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#else
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#define ROM_API_TABLE_BASE_ADDR_LEGACY 0xC0
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#define ROM_VERSION_OFFSET 0x48
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#endif
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#define ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15 0xC4
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#define ROM_API_TABLE_BASE_ADDR_MX6DL_TO12 0xC4
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#define ROM_API_HWCNFG_SETUP_OFFSET 0x08
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#define ROM_VERSION_TO10 0x10
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#define ROM_VERSION_TO12 0x12
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#define ROM_VERSION_TO15 0x15
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plugin_start:
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push {r0-r4, lr}
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imx6_ddr_setting
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imx6_clock_gating
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imx6_qos_setting
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/*
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* The following is to fill in those arguments for this ROM function
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* pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
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* This function is used to copy data from the storage media into DDR.
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* start - Initial (possibly partial) image load address on entry.
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* Final image load address on exit.
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* bytes - Initial (possibly partial) image size on entry.
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* Final image size on exit.
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* boot_data - Initial @ref ivt Boot Data load address.
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*/
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adr r0, boot_data2
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adr r1, image_len2
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adr r2, boot_data2
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#ifdef CONFIG_NOR_BOOT
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#ifdef CONFIG_MX6SX
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ldr r3, =ROM_VERSION_OFFSET
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ldr r4, [r3]
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cmp r4, #ROM_VERSION_TO10
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bgt before_calling_rom___pu_irom_hwcnfg_setup
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ldr r3, =0x00900b00
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ldr r4, =0x50000000
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str r4, [r3, #0x5c]
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#else
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ldr r3, =0x00900800
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ldr r4, =0x08000000
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str r4, [r3, #0xc0]
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#endif
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#endif
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/*
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* check the _pu_irom_api_table for the address
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*/
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before_calling_rom___pu_irom_hwcnfg_setup:
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ldr r3, =ROM_VERSION_OFFSET
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ldr r4, [r3]
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#if defined(CONFIG_MX6SOLO) || defined(CONFIG_MX6DL)
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ldr r3, =ROM_VERSION_TO12
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cmp r4, r3
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ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DL_TO12
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ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
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#elif defined(CONFIG_MX6Q)
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ldr r3, =ROM_VERSION_TO15
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cmp r4, r3
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ldrge r3, =ROM_API_TABLE_BASE_ADDR_MX6DQ_TO15
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ldrlt r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
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#else
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ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
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#endif
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ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
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blx r4
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after_calling_rom___pu_irom_hwcnfg_setup:
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/*
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* ROM_API_HWCNFG_SETUP function enables MMU & Caches.
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* Thus disable MMU & Caches.
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*/
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mrc p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0*/
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ands r0, r0, #0x1 /* check if MMU is enabled */
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beq mmu_disable_notreq /* exit if MMU is already disabled */
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/* Disable caches, MMU */
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mrc p15, 0, r0, c1, c0, 0 /* read CP15 register 1 into r0 */
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bic r0, r0, #(1 << 2) /* disable D Cache */
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bic r0, r0, #0x1 /* clear bit 0 ; MMU off */
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bic r0, r0, #(0x1 << 11) /* disable Z, branch prediction */
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bic r0, r0, #(0x1 << 1) /* disable A, Strict alignment */
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/* check enabled. */
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mcr p15, 0, r0, c1, c0, 0 /* write CP15 register 1 */
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mov r0, r0
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mov r0, r0
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mov r0, r0
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mov r0, r0
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mmu_disable_notreq:
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NOP
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/* To return to ROM from plugin, we need to fill in these argument.
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* Here is what need to do:
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* Need to construct the paramters for this function before return to ROM:
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* plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
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*/
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pop {r0-r4, lr}
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push {r5}
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ldr r5, boot_data2
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str r5, [r0]
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ldr r5, image_len2
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str r5, [r1]
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ldr r5, second_ivt_offset
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str r5, [r2]
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mov r0, #1
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pop {r5}
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/* return back to ROM code */
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bx lr
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/* make the following data right in the end of the output*/
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.ltorg
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#if (defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT))
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#define FLASH_OFFSET 0x1000
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#else
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#define FLASH_OFFSET 0x400
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#endif
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/*
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* second_ivt_offset is the offset from the "second_ivt_header" to
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* "image_copy_start", which involves FLASH_OFFSET, plus the first
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* ivt_header, the plugin code size itself recorded by "ivt2_header"
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*/
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second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET)
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/*
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* The following is the second IVT header plus the second boot data
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*/
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ivt2_header: .long 0x0
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app2_code_jump_v: .long 0x0
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reserv3: .long 0x0
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dcd2_ptr: .long 0x0
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boot_data2_ptr: .long 0x0
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self_ptr2: .long 0x0
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app_code_csf2: .long 0x0
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reserv4: .long 0x0
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boot_data2: .long 0x0
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image_len2: .long 0x0
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plugin2: .long 0x0
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