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https://github.com/brain-hackers/u-boot-brain
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308deab9b1
Add a new variable secondary_boot_code_start, which holds a pointer to the start of the spin table code. This will help to relocate the code section. While at it, move the size variable from the end to the beginning so there is a common section for the variables. Remove any other symbols. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2014-2015, Freescale Semiconductor
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*/
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#ifndef _FSL_LAYERSCAPE_MP_H
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#define _FSL_LAYERSCAPE_MP_H
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/*
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* Each spin table element is defined as
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* struct {
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* uint64_t entry_addr;
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* uint64_t status;
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* uint64_t lpid;
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* uint64_t arch_comp;
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* };
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* we pad this struct to 64 bytes so each entry is in its own cacheline
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* the actual spin table is an array of these structures
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*/
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#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
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#define SPIN_TABLE_ELEM_STATUS_IDX 1
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#define SPIN_TABLE_ELEM_LPID_IDX 2
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/* compare os arch and cpu arch */
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#define SPIN_TABLE_ELEM_ARCH_COMP_IDX 3
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#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */
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#define SPIN_TABLE_ELEM_SIZE 64
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/* os arch is same as cpu arch */
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#define OS_ARCH_SAME 0
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/* os arch is different from cpu arch */
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#define OS_ARCH_DIFF 1
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#define id_to_core(x) ((x & 3) | (x >> 6))
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#ifndef __ASSEMBLY__
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extern u64 __real_cntfrq;
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extern void *secondary_boot_addr;
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extern void *secondary_boot_code_start;
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extern size_t secondary_boot_code_size;
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#ifdef CONFIG_MP
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int fsl_layerscape_wake_seconday_cores(void);
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#else
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static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; }
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#endif
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void *get_spin_tbl_addr(void);
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int is_core_online(u64 cpu_id);
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u32 cpu_pos_mask(void);
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#endif
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#endif /* _FSL_LAYERSCAPE_MP_H */
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