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https://github.com/brain-hackers/u-boot-brain
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2d16a1a6c9
NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI implementation in PPA firmware, but this macro naming too generic, so this patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI. And this macro CONFIG_ARMV8_PSCI will be used for a generic PSCI for ARMv8 which will be added in following patchs. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
/*
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* Copyright (c) 2013, Google Inc.
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*
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* Copyright (C) 2011
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* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
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* - Added prep subcommand support
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* - Reorganized source - modeled after powerpc version
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdt_support.h>
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#ifdef CONFIG_ARMV7_NONSEC
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#include <asm/armv7.h>
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#endif
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#include <asm/psci.h>
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#include <asm/spin_table.h>
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DECLARE_GLOBAL_DATA_PTR;
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int arch_fixup_fdt(void *blob)
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{
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bd_t *bd = gd->bd;
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int bank, ret;
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u64 start[CONFIG_NR_DRAM_BANKS];
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u64 size[CONFIG_NR_DRAM_BANKS];
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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start[bank] = bd->bi_dram[bank].start;
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size[bank] = bd->bi_dram[bank].size;
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#ifdef CONFIG_ARMV7_NONSEC
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ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
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if (ret)
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return ret;
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#endif
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}
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ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
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if (ret)
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return ret;
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#ifdef CONFIG_ARMV8_SPIN_TABLE
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ret = spin_table_update_dt(blob);
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if (ret)
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return ret;
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#endif
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#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_FSL_PPA_ARMV8_PSCI)
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ret = psci_update_dt(blob);
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if (ret)
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return ret;
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#endif
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return 0;
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}
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