Troy Kisky 2bf3359ea5 i.mx6q: mx6qsabrelite: Update the network configuration ... Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>		2012-02-27 21:19:25 +01:00
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imximage.cfg	mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform	2012-02-27 21:19:23 +01:00
Makefile	i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board	2012-01-16 08:40:10 +01:00
mx6qsabrelite.c	i.mx6q: mx6qsabrelite: Update the network configuration	2012-02-27 21:19:25 +01:00