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https://github.com/brain-hackers/u-boot-brain
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2be296538e
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
89 lines
2.2 KiB
C
89 lines
2.2 KiB
C
/*
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* include/configs/salvator-x.h
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* This file is Salvator-X board configuration.
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __SALVATOR_X_H
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#define __SALVATOR_X_H
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#undef DEBUG
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#define CONFIG_RCAR_BOARD_STRING "Salvator-X"
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#include "rcar-gen3-common.h"
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF2
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#define CONFIG_CONS_INDEX 2
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
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/* [A] Hyper Flash */
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/* use to RPC(SPI Multi I/O Bus Controller) */
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/* Ethernet RAVB */
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#define CONFIG_NET_MULTI
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#define CONFIG_PHY_MICREL
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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/* XTAL_CLK : 33.33MHz */
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#define RCAR_XTAL_CLK 33333333u
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#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
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/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
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/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
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#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
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#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
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#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
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/* Generic Timer Definitions (use in assembler source) */
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#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
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/* Generic Interrupt Controller Definitions */
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#define CONFIG_GICV2
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#define GICD_BASE 0xF1010000
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#define GICC_BASE 0xF1020000
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/* i2c */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x60
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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#define CONFIG_SH_I2C_CLOCK 10000000
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
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/* USB */
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#ifdef CONFIG_R8A7795
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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#else
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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/* SDHI */
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#define CONFIG_SH_SDHI_FREQ 200000000
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#define CONFIG_SYS_MMC_ENV_PART 2
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/* Module stop status bits */
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/* MFIS, SCIF1 */
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#define CONFIG_SMSTP2_ENA 0x00002040
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/* SCIF2 */
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#define CONFIG_SMSTP3_ENA 0x00000400
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/* INTC-AP, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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#endif /* __SALVATOR_X_H */
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