York Sun 2bba85f412 powerpc/mpc8xxx: Extend CWL table ... Extend CAS write Latency (CWL) table to comply with DDR3 spec Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-09-29 19:01:05 -05:00
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common_timing_params.h	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
ctrl_regs.c	powerpc/mpc8xxx: Extend CWL table	2011-09-29 19:01:05 -05:00
ddr1_dimm_params.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
ddr2_dimm_params.c	mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements	2011-04-04 09:24:43 -05:00
ddr3_dimm_params.c	powerpc/mpc8xxx: check SPD length before using part number	2011-07-11 13:24:19 -05:00
ddr.h	powerpc/mpc8xxx: Enable calculation for fixed DDR chips	2011-07-11 13:24:20 -05:00
lc_common_dimm_params.c	powerpc/mpc8xxx: reword max tCKmin message	2011-05-13 00:36:11 -05:00
main.c	powerpc/mpc8xxx: Adding fallback to raw timing on supported boards	2011-07-11 13:24:20 -05:00
Makefile	powerpc/mpc8xxx: Enable calculation for fixed DDR chips	2011-07-11 13:24:20 -05:00
options.c	powerpc/mpc8xxx: fix DDR data width checking	2011-07-11 13:24:20 -05:00
util.c	fsl-ddr: Fix mixed-case macro names	2011-04-29 10:31:01 -05:00