Simon Glass d188b18f65 x86: Refactor PCI to permit alternate init ... We want access PCI earlier in the init sequence, so refactor the code so that it does not require use of a BSS variable to work. This will allow us to use early malloc() to store information about a PCI hose. Common PCI code moves to arch/x86/cpu/pci.c and a new board_pci_setup_hose() function is provided by boards to set up the (single) hose used by that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2014-11-21 07:34:11 +01:00
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car.S	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
coreboot.c	x86: Emit post codes in startup code for Chromebooks	2014-11-21 07:34:11 +01:00
ipchecksum.c	x86: Import code from coreboot's libpayload to parse the coreboot table	2011-12-19 13:26:15 +11:00
Makefile	x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory	2014-11-21 07:24:12 +01:00
pci.c	x86: Refactor PCI to permit alternate init	2014-11-21 07:34:11 +01:00
sdram.c	x86: Fix up some missing prototypes	2014-11-21 07:24:09 +01:00
tables.c	SPDX-License-Identifier: convert BSD-3-Clause files	2013-08-19 15:45:35 -04:00
timestamp.c	x86: Support adding coreboot timestanps to bootstage	2013-05-13 13:33:22 -07:00