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u-boot-brain/board/Marvell/db-88f6820-gp
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Chris Packham 2b4ffbf6b4 ARM: mvebu: a38x: sync ddr training code with upstream 
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.

The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef

  find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
    xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
		-UCONFIG_APN806 -UCONFIG_MC_STATIC \
		-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
		-UCONFIG_64BIT

INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.

Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
..
db-88f6820-gp.c ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
kwbimage.cfg arm: mvebu: Add DM and OF_CONTROL support to SPL 2016-01-14 14:08:59 +01:00
MAINTAINERS arm: mvebu: db-88f6820-gp: Add MAINTAINERS file 2015-07-10 14:51:31 +02:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
README arm: mvebu: db-88f6820: Add SPL support with DDR init code 2015-07-23 10:39:35 +02:00

README 

Update from original Marvell U-Boot to mainline U-Boot:
-------------------------------------------------------

The resulting image including the SPL binary with the
full DDR setup is "u-boot-spl.kwb".

To update the SPI NOR flash, please use the following
command:

=> sf probe;tftpboot 2000000 db-88f6820-gp/u-boot-spl.kwb;\
sf update 2000000 0 60000

Note that the original Marvell U-Boot seems to have
problems with the "sf update" command. This does not
work reliable. So here this command should be used:

=> sf probe;tftpboot 2000000 db-88f6820-gp/u-boot-spl.kwb;\
sf erase 0 60000;sf write 2000000 0 60000