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https://github.com/brain-hackers/u-boot-brain
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d9b6f58efd
In current Linux kernel Tegra DT files, 64-bit addresses are represented in unit addresses as a pair of comma-separated 32-bit values. Apparently this is no longer the correct representation for simple busses, and the unit address should be represented as a single 64-bit value. If this is changed in the DTs, arm/arm/mach-tegra/board2.c:ft_system_setup() will no longer be able to find and enable the GPU node, since it looks up the node by name. Fix that function to enable nodes based on their compatible value rather than their node name. This will work no matter what the node name is, i.e for DTs both before and after any rename operation. Cc: Thierry Reding <treding@nvidia.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
53 lines
1.0 KiB
C
53 lines
1.0 KiB
C
/*
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* Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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/* Tegra vpr routines */
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch/mc.h>
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#include <fdt_support.h>
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static bool _configured;
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void tegra_gpu_config(void)
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{
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struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
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/* Turn VPR off */
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writel(0, &mc->mc_video_protect_size_mb);
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writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
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&mc->mc_video_protect_reg_ctrl);
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/* read back to ensure the write went through */
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readl(&mc->mc_video_protect_reg_ctrl);
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debug("configured VPR\n");
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_configured = true;
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}
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#if defined(CONFIG_OF_LIBFDT)
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int tegra_gpu_enable_node(void *blob, const char *compat)
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{
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int offset;
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if (!_configured)
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return 0;
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offset = fdt_node_offset_by_compatible(blob, -1, compat);
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while (offset != -FDT_ERR_NOTFOUND) {
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fdt_status_okay(blob, offset);
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offset = fdt_node_offset_by_compatible(blob, offset, compat);
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}
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return 0;
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}
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#endif
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