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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
236 lines
5.4 KiB
C
236 lines
5.4 KiB
C
/*
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* (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc824x.h>
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#include <asm/io.h>
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#include <pci.h>
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#include "pn62.h"
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typedef struct {
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pci_dev_t devno;
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volatile u32 *csr;
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} i2155x_t;
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static i2155x_t i2155x = { 0, NULL };
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static struct pci_device_id i2155x_ids[] = {
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{ 0x1011, 0x0046 }, /* i21554 */
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{ 0x8086, 0xb555 } /* i21555 */
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};
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int i2155x_init(void)
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{
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pci_dev_t devno;
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u32 val;
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int i;
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/*
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* Find the Intel bridge.
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*/
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if ((devno = pci_find_devices(i2155x_ids, 0)) < 0) {
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printf("Error: Intel bridge 2155x not found!\n");
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return -1;
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}
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i2155x.devno = devno;
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/*
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* Get auto-configured base address for CSR access.
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*/
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pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &val);
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if (val & PCI_BASE_ADDRESS_SPACE_IO) {
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val &= PCI_BASE_ADDRESS_IO_MASK;
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i2155x.csr = (volatile u32 *)(_IO_BASE + val);
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} else {
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val &= PCI_BASE_ADDRESS_MEM_MASK;
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i2155x.csr = (volatile u32 *)val;
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}
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/*
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* Translate downstream memory 2 (bar3) to base of shared memory.
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*/
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i2155x_set_bar_base(3, PN62_SMEM_DEFAULT);
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/*
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* Enable memory space, I/O space and bus master bits
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* in both Primary and Secondary command registers.
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*/
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val = PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER|PCI_COMMAND_IO;
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pci_write_config_word(devno, 0x44, val);
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pci_write_config_word(devno, 0x04, val);
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/*
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* Clear scratchpad registers.
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*/
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for (i = 0; i < (I2155X_SCRAPAD_MAX - 1); i++) {
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i2155x_write_scrapad(i, 0x0);
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}
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/*
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* Set interrupt line for Linux.
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*/
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pci_write_config_byte(devno, PCI_INTERRUPT_LINE, 3);
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return 0;
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}
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/*
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* Access the Scratchpad registers 0..7 of the Intel bridge.
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*/
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void i2155x_write_scrapad(int idx, u32 val)
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{
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if (idx >= 0 && idx < I2155X_SCRAPAD_MAX)
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out_le32(i2155x.csr + (I2155X_SCRAPAD_ADDR/4) + idx, val);
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else
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printf("i2155x_write_scrapad: invalid index\n");
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}
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u32 i2155x_read_scrapad(int idx)
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{
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if (idx >= 0 && idx < I2155X_SCRAPAD_MAX)
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return in_le32(i2155x.csr + (I2155X_SCRAPAD_ADDR/4) + idx);
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else
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printf("i2155x_read_scrapad: invalid index\n");
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return -1;
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}
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void i2155x_set_bar_base(int bar, u32 base)
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{
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if (bar >= 2 && bar <= 4) {
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pci_write_config_dword(i2155x.devno,
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I2155X_BAR2_BASE + (bar - 2) * 4,
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base);
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}
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}
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/*
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* Read Vital Product Data (VPD) from the Serial EPROM attached
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* to the Intel bridge.
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*/
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int i2155x_read_vpd(int offset, int size, unsigned char *data)
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{
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int i, n;
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u16 val16;
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for (i = 0; i < size; i++) {
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pci_write_config_word(i2155x.devno, I2155X_VPD_ADDR,
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offset + i - I2155X_VPD_START);
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for (n = 10000; n > 0; n--) {
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pci_read_config_word(i2155x.devno, I2155X_VPD_ADDR, &val16);
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if ((val16 & 0x8000) != 0) /* wait for completion */
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break;
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udelay(100);
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}
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if (n == 0) {
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printf("i2155x_read_vpd: TIMEOUT\n");
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return -1;
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}
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pci_read_config_byte(i2155x.devno, I2155X_VPD_DATA, &data[i]);
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}
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return i;
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}
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static struct pci_device_id am79c95x_ids [] = {
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE },
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{ }
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};
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/*
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* Initialize the AMD ethernet controllers.
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*/
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int am79c95x_init(void)
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{
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pci_dev_t devno;
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int i;
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/*
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* Set interrupt line for Linux.
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*/
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for (i = 0; i < 2; i++) {
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if ((devno = pci_find_devices(am79c95x_ids, i)) < 0)
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break;
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pci_write_config_byte(devno, PCI_INTERRUPT_LINE, 2+i);
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}
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if (i < 2)
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printf("Error: Only %d AMD Ethernet Controller found!\n", i);
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return 0;
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}
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void set_led(unsigned int number, unsigned int function)
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{
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volatile u8 *addr;
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if ((number >= 0) && (number < PN62_LED_MAX) &&
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(function >= 0) && (function <= LED_LAST_FUNCTION)) {
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addr = (volatile u8 *)(PN62_LED_BASE + number * 8);
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out_8(addr, function&0xff);
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}
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}
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/*
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* Show fatal error indicated by Kinght Rider(tm) effect
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* in LEDS 0-7. LEDS 8-11 contain 4 bit error code.
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* Note: this function will not terminate.
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*/
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void fatal_error(unsigned int error_code)
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{
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int i, d;
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for (i = 0; i < 12; i++) {
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set_led(i, LED_0);
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}
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/*
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* Write error code.
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*/
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set_led(8, (error_code & 0x01) ? LED_1 : LED_0);
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set_led(9, (error_code & 0x02) ? LED_1 : LED_0);
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set_led(10, (error_code & 0x04) ? LED_1 : LED_0);
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set_led(11, (error_code & 0x08) ? LED_1 : LED_0);
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/*
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* Yay - Knight Rider effect!
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*/
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while(1) {
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unsigned int delay = 2000;
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for (i = 0; i < 8; i++) {
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set_led(i, LED_1);
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for (d = 0; d < delay; d++);
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set_led(i, LED_0);
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}
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for (i = 7; i > 0; i--) {
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set_led(i, LED_1);
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for (d = 0; d < delay; d++);
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set_led(i, LED_0);
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}
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}
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}
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