mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-10 06:43:28 +09:00
7a8e9bed17
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code
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*/
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#include <common.h>
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#include <command.h>
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int cpu_init(void)
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{
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/* initialize FPU, reset EM, set MP and NE */
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asm ("fninit\n" \
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"movl %cr0, %eax\n" \
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"andl $~0x4, %eax\n" \
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"orl $0x22, %eax\n" \
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"movl %eax, %cr0\n" );
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return 0;
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}
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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extern void reset_cpu(ulong addr);
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printf ("resetting ...\n");
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udelay(50000); /* wait 50 ms */
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disable_interrupts();
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reset_cpu(0);
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/*NOTREACHED*/
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return 0;
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}
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void flush_cache (unsigned long dummy1, unsigned long dummy2)
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{
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asm("wbinvd\n");
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return;
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}
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