mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 21:56:21 +09:00
7a8e9bed17
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
85 lines
2.0 KiB
ArmAsm
85 lines
2.0 KiB
ArmAsm
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* 16bit initialization code.
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* This code have to map the area of the boot flash
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* that is used by U-boot to its final destination.
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*/
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.text
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.section .start16, "ax"
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.code16
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.globl board_init16
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board_init16:
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/* Alias MMCR to 0xdf000 */
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movw $0xfffc, %dx
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movl $0x800df0cb, %eax
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outl %eax, %dx
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/* Set ds to point to MMCR alias */
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movw $0xdf00, %ax
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movw %ax, %ds
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/* Map the entire flash at 0x38000000
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* (with BOOTCS and PAR14, use 0xabfff800 for ROMCS1) */
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movl $0xc0, %edi
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movl $0x8bfff800, %eax
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movl %eax, (%di)
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/* Disable SDRAM write buffer */
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movw $0x40,%di
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xorw %ax,%ax
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movb %al, (%di)
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/* Disabe MMCR alias */
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movw $0xfffc, %dx
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movl $0x000000cb, %eax
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outl %eax, %dx
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/* the return address is tored in bp */
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jmp *%bp
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.section .bios, "ax"
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.code16
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.globl realmode_reset
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realmode_reset:
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/* Alias MMCR to 0xdf000 */
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movw $0xfffc, %dx
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movl $0x800df0cb, %eax
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outl %eax, %dx
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/* Set ds to point to MMCR alias */
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movw $0xdf00, %ax
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movw %ax, %ds
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/* issue software reset thorugh MMCR */
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movl $0xd72, %edi
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movb $0x01, %al
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movb %al, (%di)
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1: hlt
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jmp 1
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