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Add a document to describe Andestech atcspi200 spi and binding information. Signed-off-by: Rick Chen <rick@andestech.com>
38 lines
1.1 KiB
Plaintext
38 lines
1.1 KiB
Plaintext
Andestech ATCSPI200 SPI controller Device Tree Bindings
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-------------------------------------------------------
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ATCSPI200 is a Serial Peripheral Interface (SPI) controller
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which serves as a SPI master or a SPI slave.
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It is often be embedded in AE3XX and AE250 platforms.
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Required properties:
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- compatible: has to be "andestech,atcspi200".
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- reg: Base address and size of the controllers memory area.
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- #address-cells: <1>, as required by generic SPI binding.
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- #size-cells: <0>, also as required by generic SPI binding.
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- interrupts: Property with a value describing the interrupt number.
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- clocks: Clock phandles (see clock bindings for details).
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- spi-max-frequency: Maximum SPI clocking speed of device in Hz.
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Optional properties:
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- num-cs: Number of chip selects used.
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Example:
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spi: spi@f0b00000 {
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compatible = "andestech,atcspi200";
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reg = <0xf0b00000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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num-cs = <1>;
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clocks = <&spiclk>;
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interrupts = <3 4>;
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flash@0 {
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compatible = "spi-flash";
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi-cpol;
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spi-cpha;
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};
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};
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