u-boot-brain/board/freescale/corenet_ds
Shaohui Xie 2a9fab82b7 powerpc/85xx: Add PBL boot from SPI flash support on P4080DS
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
..
corenet_ds.c powerpc: Move cpu specific lmb reserve to arch_lmb_reserve 2011-04-04 09:24:40 -05:00
ddr.c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board 2011-04-04 09:24:41 -05:00
law.c powerpc/p4080: Add support for the P4080DS board 2010-08-01 11:18:40 -05:00
Makefile Switch from archive libraries to partial linking 2010-11-17 21:02:18 +01:00
p4080ds_ddr.c powerpc/85xx: Update fixed DDR3 timing table for P4080DS 2011-04-04 09:24:41 -05:00
pci.c powerpc/85xx: Rework corenet_ds pci_init_board to use common FSL PCIe code 2011-01-14 01:32:21 -06:00
tlb.c powerpc/85xx: Add PBL boot from SPI flash support on P4080DS 2011-04-10 11:17:55 -05:00