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https://github.com/brain-hackers/u-boot-brain
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9082eeac5d
The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
88 lines
2.3 KiB
C
88 lines
2.3 KiB
C
/*
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* LXT PHY drivers
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* author Andy Fleming
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*
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*/
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#include <phy.h>
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/* LXT971 Status 2 registers */
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#define MIIM_LXT971_SR2 0x11 /* Status Register 2 */
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#define MIIM_LXT971_SR2_SPEED_MASK 0x4200
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#define MIIM_LXT971_SR2_10HDX 0x0000 /* 10 Mbit half duplex selected */
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#define MIIM_LXT971_SR2_10FDX 0x0200 /* 10 Mbit full duplex selected */
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#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
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#define MIIM_LXT971_SR2_100FDX 0x4200 /* 100 Mbit full duplex selected */
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/* LXT971 */
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static int lxt971_parse_status(struct phy_device *phydev)
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{
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int mii_reg;
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int speed;
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_LXT971_SR2);
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speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK;
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switch (speed) {
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case MIIM_LXT971_SR2_10HDX:
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phydev->speed = SPEED_10;
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phydev->duplex = DUPLEX_HALF;
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break;
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case MIIM_LXT971_SR2_10FDX:
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phydev->speed = SPEED_10;
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phydev->duplex = DUPLEX_FULL;
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break;
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case MIIM_LXT971_SR2_100HDX:
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phydev->speed = SPEED_100;
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phydev->duplex = DUPLEX_HALF;
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break;
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default:
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phydev->speed = SPEED_100;
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phydev->duplex = DUPLEX_FULL;
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}
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return 0;
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}
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static int lxt971_startup(struct phy_device *phydev)
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{
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genphy_update_link(phydev);
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lxt971_parse_status(phydev);
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return 0;
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}
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static struct phy_driver LXT971_driver = {
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.name = "LXT971",
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.uid = 0x1378e0,
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.mask = 0xfffff0,
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.features = PHY_BASIC_FEATURES,
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.config = &genphy_config_aneg,
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.startup = &lxt971_startup,
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.shutdown = &genphy_shutdown,
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};
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int phy_lxt_init(void)
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{
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phy_register(&LXT971_driver);
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return 0;
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}
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