Lukasz Majewski 29e7fc19ce usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST ... It turned out that current dwc3 gadget code is preparing multiple TRBs for a transfer. Unfortunately, when multiple requests are in the same queue, only for the last one the LST (last) ctrl bit is set. Due to that dwc3 HW executes all TRBs up till the one marked as last. Unfortunately, UMS requires call of ->complete callback after any send TRB. This is the reason for "hangs" in executing UMS. This code simplifies this situation and set each TRB's ctrl field bit to be last (LST bit). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>		2015-04-14 05:48:12 +02:00
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dwc3	usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST	2015-04-14 05:48:12 +02:00
eth	usb: eth: asix: Build warning fixes for 64-bit	2015-04-14 05:47:47 +02:00
gadget	usb: dwc3: gadget: add common endpoint configuration for dwc3 udc driver	2015-04-14 05:48:12 +02:00
host	usb: dwc2: retry NAK'd interrupt transfers	2015-04-14 05:47:59 +02:00
musb	include: move various macros to include/linux/kernel.h	2014-11-20 11:28:25 -05:00
musb-new	usb: modify usb_gadget_handle_interrupts to take controller index	2015-04-14 05:48:11 +02:00
phy	usb: phy: omap_usb_phy: fix build breakage	2014-12-04 11:04:13 -05:00
ulpi	drivers: usb: convert makefiles to Kbuild style	2013-10-31 13:25:38 -04:00
Kconfig	usb: add basic USB configs in Kconfig	2014-11-12 00:21:18 +09:00