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![Stefano Babic](/assets/img/avatar_default.png)
The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de>
201 lines
3.7 KiB
C
201 lines
3.7 KiB
C
/*
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* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <spi.h>
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#include <asm/errno.h>
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#include <linux/types.h>
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#include <fsl_pmic.h>
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static struct spi_slave *slave;
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struct spi_slave *pmic_spi_probe(void)
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{
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return spi_setup_slave(CONFIG_FSL_PMIC_BUS,
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CONFIG_FSL_PMIC_CS,
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CONFIG_FSL_PMIC_CLK,
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CONFIG_FSL_PMIC_MODE);
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}
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void pmic_spi_free(struct spi_slave *slave)
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{
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if (slave)
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spi_free_slave(slave);
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}
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u32 pmic_reg(u32 reg, u32 val, u32 write)
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{
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u32 pmic_tx, pmic_rx;
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u32 tmp;
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if (!slave) {
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slave = pmic_spi_probe();
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if (!slave)
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return -1;
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}
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if (reg > 63 || write > 1) {
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printf("<reg num> = %d is invalid. Should be less then 63\n",
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reg);
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return -1;
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}
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if (spi_claim_bus(slave))
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return -1;
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pmic_tx = (write << 31) | (reg << 25) | (val & 0x00FFFFFF);
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tmp = cpu_to_be32(pmic_tx);
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if (spi_xfer(slave, 4 << 3, &tmp, &pmic_rx,
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SPI_XFER_BEGIN | SPI_XFER_END)) {
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spi_release_bus(slave);
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return -1;
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}
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if (write) {
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pmic_tx &= ~(1 << 31);
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tmp = cpu_to_be32(pmic_tx);
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if (spi_xfer(slave, 4 << 3, &tmp, &pmic_rx,
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SPI_XFER_BEGIN | SPI_XFER_END)) {
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spi_release_bus(slave);
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return -1;
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}
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}
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spi_release_bus(slave);
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return cpu_to_be32(pmic_rx);
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}
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void pmic_reg_write(u32 reg, u32 value)
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{
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pmic_reg(reg, value, 1);
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}
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u32 pmic_reg_read(u32 reg)
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{
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return pmic_reg(reg, 0, 0);
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}
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void pmic_show_pmic_info(void)
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{
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u32 rev_id;
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rev_id = pmic_reg_read(REG_IDENTIFICATION);
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printf("PMIC ID: 0x%08x [Rev: ", rev_id);
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switch (rev_id & 0x1F) {
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case 0x1:
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puts("1.0");
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break;
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case 0x9:
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puts("1.1");
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break;
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case 0xA:
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puts("1.2");
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break;
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case 0x10:
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puts("2.0");
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break;
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case 0x11:
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puts("2.1");
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break;
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case 0x18:
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puts("3.0");
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break;
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case 0x19:
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puts("3.1");
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break;
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case 0x1A:
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puts("3.2");
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break;
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case 0x2:
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puts("3.2A");
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break;
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case 0x1B:
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puts("3.3");
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break;
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case 0x1D:
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puts("3.5");
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break;
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default:
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puts("unknown");
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break;
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}
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puts("]\n");
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}
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static void pmic_dump(int numregs)
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{
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u32 val;
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int i;
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pmic_show_pmic_info();
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for (i = 0; i < numregs; i++) {
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val = pmic_reg_read(i);
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if (!(i % 8))
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printf ("\n0x%02x: ", i);
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printf("%08x ", val);
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}
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puts("\n");
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}
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int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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char *cmd;
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int nregs;
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u32 val;
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/* at least two arguments please */
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if (argc < 2)
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return cmd_usage(cmdtp);
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cmd = argv[1];
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if (strcmp(cmd, "dump") == 0) {
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if (argc < 3)
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return cmd_usage(cmdtp);
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nregs = simple_strtoul(argv[2], NULL, 16);
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pmic_dump(nregs);
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return 0;
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}
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if (strcmp(cmd, "write") == 0) {
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if (argc < 4)
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return cmd_usage(cmdtp);
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nregs = simple_strtoul(argv[2], NULL, 16);
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val = simple_strtoul(argv[3], NULL, 16);
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pmic_reg_write(nregs, val);
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return 0;
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}
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/* No subcommand found */
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return 1;
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}
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U_BOOT_CMD(
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pmic, CONFIG_SYS_MAXARGS, 1, do_pmic,
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"Freescale PMIC (Atlas)",
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"dump [numregs] dump registers\n"
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"pmic write <reg> <value> - write register"
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);
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