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u-boot-brain/arch/arm/include/asm/arch-fsl-layerscape
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Mingkai Hu bbc8e053ba armv8/ls1043a: Implement workaround for erratum A009660 
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:40:56 -08:00
..
clock.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
config.h armv8/ls1043a: Implement workaround for erratum A009660 2016-02-24 08:40:56 -08:00
cpu.h armv8/ls1043aqds: add QSPI boot support 2016-01-27 08:29:09 -08:00
fdt.h armv8/ls1043aqds: add LS1043AQDS board support 2015-11-30 09:11:10 -08:00
fsl_serdes.h armv8: ls2085a: Add support of LS2085A SoC 2015-11-30 09:10:47 -08:00
immap_lsch2.h secure_boot: create function to determine boot mode 2016-01-27 08:12:42 -08:00
immap_lsch3.h armv8: Add sata support on Layerscape ARMv8 board 2015-12-15 08:57:35 +08:00
imx-regs.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
ls2080a_stream_id.h armv8: LS2080A: Rename LS2085A to reflect LS2080A 2015-11-30 08:53:04 -08:00
mmu.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
mp.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
ns_access.h armv8/fsl_lsch2: Add fsl_lsch2 SoC 2015-10-29 10:34:00 -07:00
soc.h armv8: ls2040a: Add support of LS2040A SoC 2016-01-25 08:24:17 -08:00
speed.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00