mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-27 20:38:52 +09:00
![Heiner Kallweit](/assets/img/avatar_default.png)
As a prerequisite for adding a Meson GX MMC driver update the Meson GXBB / Odroid-C2 device tree in Uboot with the latest version from Linux. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
517 lines
10 KiB
Plaintext
517 lines
10 KiB
Plaintext
/*
|
|
* Copyright (c) 2016 Andreas Färber
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of the
|
|
* License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* Or, alternatively,
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
#include "meson-gx.dtsi"
|
|
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
|
|
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
|
|
#include <dt-bindings/clock/gxbb-clkc.h>
|
|
#include <dt-bindings/clock/gxbb-aoclkc.h>
|
|
#include <dt-bindings/reset/gxbb-aoclkc.h>
|
|
|
|
/ {
|
|
compatible = "amlogic,meson-gxbb";
|
|
|
|
soc {
|
|
usb0_phy: phy@c0000000 {
|
|
compatible = "amlogic,meson-gxbb-usb2-phy";
|
|
#phy-cells = <0>;
|
|
reg = <0x0 0xc0000000 0x0 0x20>;
|
|
resets = <&reset RESET_USB_OTG>;
|
|
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
|
|
clock-names = "usb_general", "usb";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1_phy: phy@c0000020 {
|
|
compatible = "amlogic,meson-gxbb-usb2-phy";
|
|
#phy-cells = <0>;
|
|
reg = <0x0 0xc0000020 0x0 0x20>;
|
|
resets = <&reset RESET_USB_OTG>;
|
|
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
|
|
clock-names = "usb_general", "usb";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: usb@c9000000 {
|
|
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
|
|
reg = <0x0 0xc9000000 0x0 0x40000>;
|
|
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
|
|
clock-names = "otg";
|
|
phys = <&usb0_phy>;
|
|
phy-names = "usb2-phy";
|
|
dr_mode = "host";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: usb@c9100000 {
|
|
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
|
|
reg = <0x0 0xc9100000 0x0 0x40000>;
|
|
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
|
|
clock-names = "otg";
|
|
phys = <&usb1_phy>;
|
|
phy-names = "usb2-phy";
|
|
dr_mode = "host";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
&cbus {
|
|
spifc: spi@8c80 {
|
|
compatible = "amlogic,meson-gxbb-spifc";
|
|
reg = <0x0 0x08c80 0x0 0x80>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clkc CLKID_SPI>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
ðmac {
|
|
clocks = <&clkc CLKID_ETH>,
|
|
<&clkc CLKID_FCLK_DIV2>,
|
|
<&clkc CLKID_MPLL2>;
|
|
clock-names = "stmmaceth", "clkin0", "clkin1";
|
|
};
|
|
|
|
&aobus {
|
|
pinctrl_aobus: pinctrl@14 {
|
|
compatible = "amlogic,meson-gxbb-aobus-pinctrl";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
gpio_ao: bank@14 {
|
|
reg = <0x0 0x00014 0x0 0x8>,
|
|
<0x0 0x0002c 0x0 0x4>,
|
|
<0x0 0x00024 0x0 0x8>;
|
|
reg-names = "mux", "pull", "gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
uart_ao_a_pins: uart_ao_a {
|
|
mux {
|
|
groups = "uart_tx_ao_a", "uart_rx_ao_a";
|
|
function = "uart_ao";
|
|
};
|
|
};
|
|
|
|
uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
|
|
mux {
|
|
groups = "uart_cts_ao_a",
|
|
"uart_rts_ao_a";
|
|
function = "uart_ao";
|
|
};
|
|
};
|
|
|
|
uart_ao_b_pins: uart_ao_b {
|
|
mux {
|
|
groups = "uart_tx_ao_b", "uart_rx_ao_b";
|
|
function = "uart_ao_b";
|
|
};
|
|
};
|
|
|
|
uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
|
|
mux {
|
|
groups = "uart_cts_ao_b",
|
|
"uart_rts_ao_b";
|
|
function = "uart_ao_b";
|
|
};
|
|
};
|
|
|
|
remote_input_ao_pins: remote_input_ao {
|
|
mux {
|
|
groups = "remote_input_ao";
|
|
function = "remote_input_ao";
|
|
};
|
|
};
|
|
|
|
i2c_ao_pins: i2c_ao {
|
|
mux {
|
|
groups = "i2c_sck_ao",
|
|
"i2c_sda_ao";
|
|
function = "i2c_ao";
|
|
};
|
|
};
|
|
|
|
pwm_ao_a_3_pins: pwm_ao_a_3 {
|
|
mux {
|
|
groups = "pwm_ao_a_3";
|
|
function = "pwm_ao_a_3";
|
|
};
|
|
};
|
|
|
|
pwm_ao_a_6_pins: pwm_ao_a_6 {
|
|
mux {
|
|
groups = "pwm_ao_a_6";
|
|
function = "pwm_ao_a_6";
|
|
};
|
|
};
|
|
|
|
pwm_ao_a_12_pins: pwm_ao_a_12 {
|
|
mux {
|
|
groups = "pwm_ao_a_12";
|
|
function = "pwm_ao_a_12";
|
|
};
|
|
};
|
|
|
|
pwm_ao_b_pins: pwm_ao_b {
|
|
mux {
|
|
groups = "pwm_ao_b";
|
|
function = "pwm_ao_b";
|
|
};
|
|
};
|
|
};
|
|
|
|
clkc_AO: clock-controller@040 {
|
|
compatible = "amlogic,gxbb-aoclkc";
|
|
reg = <0x0 0x00040 0x0 0x4>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|
|
|
|
pwm_ab_AO: pwm@550 {
|
|
compatible = "amlogic,meson-gxbb-pwm";
|
|
reg = <0x0 0x0550 0x0 0x10>;
|
|
#pwm-cells = <3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_AO: i2c@500 {
|
|
compatible = "amlogic,meson-gxbb-i2c";
|
|
reg = <0x0 0x500 0x0 0x20>;
|
|
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clkc CLKID_AO_I2C>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&periphs {
|
|
pinctrl_periphs: pinctrl@4b0 {
|
|
compatible = "amlogic,meson-gxbb-periphs-pinctrl";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
gpio: bank@4b0 {
|
|
reg = <0x0 0x004b0 0x0 0x28>,
|
|
<0x0 0x004e8 0x0 0x14>,
|
|
<0x0 0x00120 0x0 0x14>,
|
|
<0x0 0x00430 0x0 0x40>;
|
|
reg-names = "mux", "pull", "pull-enable", "gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
emmc_pins: emmc {
|
|
mux {
|
|
groups = "emmc_nand_d07",
|
|
"emmc_cmd",
|
|
"emmc_clk",
|
|
"emmc_ds";
|
|
function = "emmc";
|
|
};
|
|
};
|
|
|
|
nor_pins: nor {
|
|
mux {
|
|
groups = "nor_d",
|
|
"nor_q",
|
|
"nor_c",
|
|
"nor_cs";
|
|
function = "nor";
|
|
};
|
|
};
|
|
|
|
sdcard_pins: sdcard {
|
|
mux {
|
|
groups = "sdcard_d0",
|
|
"sdcard_d1",
|
|
"sdcard_d2",
|
|
"sdcard_d3",
|
|
"sdcard_cmd",
|
|
"sdcard_clk";
|
|
function = "sdcard";
|
|
};
|
|
};
|
|
|
|
sdio_pins: sdio {
|
|
mux {
|
|
groups = "sdio_d0",
|
|
"sdio_d1",
|
|
"sdio_d2",
|
|
"sdio_d3",
|
|
"sdio_cmd",
|
|
"sdio_clk";
|
|
function = "sdio";
|
|
};
|
|
};
|
|
|
|
sdio_irq_pins: sdio_irq {
|
|
mux {
|
|
groups = "sdio_irq";
|
|
function = "sdio";
|
|
};
|
|
};
|
|
|
|
uart_a_pins: uart_a {
|
|
mux {
|
|
groups = "uart_tx_a",
|
|
"uart_rx_a";
|
|
function = "uart_a";
|
|
};
|
|
};
|
|
|
|
uart_a_cts_rts_pins: uart_a_cts_rts {
|
|
mux {
|
|
groups = "uart_cts_a",
|
|
"uart_rts_a";
|
|
function = "uart_a";
|
|
};
|
|
};
|
|
|
|
uart_b_pins: uart_b {
|
|
mux {
|
|
groups = "uart_tx_b",
|
|
"uart_rx_b";
|
|
function = "uart_b";
|
|
};
|
|
};
|
|
|
|
uart_b_cts_rts_pins: uart_b_cts_rts {
|
|
mux {
|
|
groups = "uart_cts_b",
|
|
"uart_rts_b";
|
|
function = "uart_b";
|
|
};
|
|
};
|
|
|
|
uart_c_pins: uart_c {
|
|
mux {
|
|
groups = "uart_tx_c",
|
|
"uart_rx_c";
|
|
function = "uart_c";
|
|
};
|
|
};
|
|
|
|
uart_c_cts_rts_pins: uart_c_cts_rts {
|
|
mux {
|
|
groups = "uart_cts_c",
|
|
"uart_rts_c";
|
|
function = "uart_c";
|
|
};
|
|
};
|
|
|
|
i2c_a_pins: i2c_a {
|
|
mux {
|
|
groups = "i2c_sck_a",
|
|
"i2c_sda_a";
|
|
function = "i2c_a";
|
|
};
|
|
};
|
|
|
|
i2c_b_pins: i2c_b {
|
|
mux {
|
|
groups = "i2c_sck_b",
|
|
"i2c_sda_b";
|
|
function = "i2c_b";
|
|
};
|
|
};
|
|
|
|
i2c_c_pins: i2c_c {
|
|
mux {
|
|
groups = "i2c_sck_c",
|
|
"i2c_sda_c";
|
|
function = "i2c_c";
|
|
};
|
|
};
|
|
|
|
eth_rgmii_pins: eth-rgmii {
|
|
mux {
|
|
groups = "eth_mdio",
|
|
"eth_mdc",
|
|
"eth_clk_rx_clk",
|
|
"eth_rx_dv",
|
|
"eth_rxd0",
|
|
"eth_rxd1",
|
|
"eth_rxd2",
|
|
"eth_rxd3",
|
|
"eth_rgmii_tx_clk",
|
|
"eth_tx_en",
|
|
"eth_txd0",
|
|
"eth_txd1",
|
|
"eth_txd2",
|
|
"eth_txd3";
|
|
function = "eth";
|
|
};
|
|
};
|
|
|
|
eth_rmii_pins: eth-rmii {
|
|
mux {
|
|
groups = "eth_mdio",
|
|
"eth_mdc",
|
|
"eth_clk_rx_clk",
|
|
"eth_rx_dv",
|
|
"eth_rxd0",
|
|
"eth_rxd1",
|
|
"eth_tx_en",
|
|
"eth_txd0",
|
|
"eth_txd1";
|
|
function = "eth";
|
|
};
|
|
};
|
|
|
|
pwm_a_x_pins: pwm_a_x {
|
|
mux {
|
|
groups = "pwm_a_x";
|
|
function = "pwm_a_x";
|
|
};
|
|
};
|
|
|
|
pwm_a_y_pins: pwm_a_y {
|
|
mux {
|
|
groups = "pwm_a_y";
|
|
function = "pwm_a_y";
|
|
};
|
|
};
|
|
|
|
pwm_b_pins: pwm_b {
|
|
mux {
|
|
groups = "pwm_b";
|
|
function = "pwm_b";
|
|
};
|
|
};
|
|
|
|
pwm_d_pins: pwm_d {
|
|
mux {
|
|
groups = "pwm_d";
|
|
function = "pwm_d";
|
|
};
|
|
};
|
|
|
|
pwm_e_pins: pwm_e {
|
|
mux {
|
|
groups = "pwm_e";
|
|
function = "pwm_e";
|
|
};
|
|
};
|
|
|
|
pwm_f_x_pins: pwm_f_x {
|
|
mux {
|
|
groups = "pwm_f_x";
|
|
function = "pwm_f_x";
|
|
};
|
|
};
|
|
|
|
pwm_f_y_pins: pwm_f_y {
|
|
mux {
|
|
groups = "pwm_f_y";
|
|
function = "pwm_f_y";
|
|
};
|
|
};
|
|
|
|
hdmi_hpd_pins: hdmi_hpd {
|
|
mux {
|
|
groups = "hdmi_hpd";
|
|
function = "hdmi_hpd";
|
|
};
|
|
};
|
|
|
|
hdmi_i2c_pins: hdmi_i2c {
|
|
mux {
|
|
groups = "hdmi_sda", "hdmi_scl";
|
|
function = "hdmi_i2c";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&hiubus {
|
|
clkc: clock-controller@0 {
|
|
compatible = "amlogic,gxbb-clkc";
|
|
#clock-cells = <1>;
|
|
reg = <0x0 0x0 0x0 0x3db>;
|
|
};
|
|
};
|
|
|
|
&i2c_A {
|
|
clocks = <&clkc CLKID_I2C>;
|
|
};
|
|
|
|
&i2c_B {
|
|
clocks = <&clkc CLKID_I2C>;
|
|
};
|
|
|
|
&i2c_C {
|
|
clocks = <&clkc CLKID_I2C>;
|
|
};
|
|
|
|
&sd_emmc_a {
|
|
clocks = <&clkc CLKID_SD_EMMC_A>,
|
|
<&xtal>,
|
|
<&clkc CLKID_FCLK_DIV2>;
|
|
clock-names = "core", "clkin0", "clkin1";
|
|
};
|
|
|
|
&sd_emmc_b {
|
|
clocks = <&clkc CLKID_SD_EMMC_B>,
|
|
<&xtal>,
|
|
<&clkc CLKID_FCLK_DIV2>;
|
|
clock-names = "core", "clkin0", "clkin1";
|
|
};
|
|
|
|
&sd_emmc_c {
|
|
clocks = <&clkc CLKID_SD_EMMC_C>,
|
|
<&xtal>,
|
|
<&clkc CLKID_FCLK_DIV2>;
|
|
clock-names = "core", "clkin0", "clkin1";
|
|
};
|
|
|
|
&vpu {
|
|
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
|
|
};
|