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![Siva Durga Prasad Paladugu](/assets/img/avatar_default.png)
This patch adds new mini target for versal. This configuration is very minimal in size which runs from OCM. It contains support for mtest which can be used for running DDR memory tests. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
37 lines
589 B
Plaintext
37 lines
589 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx Versal Mini Configuration
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*
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* (C) Copyright 2019, Xilinx, Inc.
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*
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* Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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*/
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/dts-v1/;
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/ {
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model = "Versal MINI";
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compatible = "xlnx,versal";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &dcc;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
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};
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dcc: dcc {
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compatible = "arm,dcc";
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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};
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