Simon Glass 28d7d76a86 x86: Add an option to control the position of SPL ... For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different location from where SPL must be placed in ROM. In other words, although SPL runs before SDRAM is set up, it is not execute-in-place (XIP). Add a Kconfig option for the ROM position. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2019-12-15 11:44:19 +08:00
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cpu	x86: Add support for newer CAR schemes	2019-12-15 11:44:18 +08:00
dts	x86: Add an option to control the position of SPL	2019-12-15 11:44:19 +08:00
include/asm	x86: Add support for newer CAR schemes	2019-12-15 11:44:18 +08:00
lib	x86: Don't include the BIOS emulator in TPL	2019-12-15 11:44:18 +08:00
config.mk	x86: efi: app: Generate Microsoft PE format compliant image	2018-12-02 21:59:36 +01:00
Kconfig	x86: Add an option to control the position of SPL	2019-12-15 11:44:19 +08:00
Makefile	x86: Allow 16-bit init to be in TPL	2019-05-08 13:02:13 +08:00