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https://github.com/brain-hackers/u-boot-brain
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9f6a14c47f
The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
133 lines
3.6 KiB
C
133 lines
3.6 KiB
C
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
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{
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unsigned int block, lastblock;
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unsigned int page, page_offset;
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/* offs has to be aligned to a page address! */
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block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
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lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
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page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
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page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
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while (block <= lastblock) {
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if (!nand_is_bad_block(block)) {
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/* Skip bad blocks */
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while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
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nand_read_page(block, page, dst);
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/*
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* When offs is not aligned to page address the
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* extra offset is copied to dst as well. Copy
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* the image such that its first byte will be
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* at the dst.
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*/
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if (unlikely(page_offset)) {
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memmove(dst, dst + page_offset,
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CONFIG_SYS_NAND_PAGE_SIZE);
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dst = (void *)((int)dst - page_offset);
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page_offset = 0;
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}
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dst += CONFIG_SYS_NAND_PAGE_SIZE;
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page++;
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}
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page = 0;
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} else {
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lastblock++;
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}
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block++;
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}
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return 0;
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}
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/**
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* nand_spl_adjust_offset - Adjust offset from a starting sector
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* @sector: Address of the sector
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* @offs: Offset starting from @sector
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*
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* If one or more bad blocks are in the address space between @sector
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* and @sector + @offs, @offs is increased by the NAND block size for
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* each bad block found.
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*/
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u32 nand_spl_adjust_offset(u32 sector, u32 offs)
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{
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unsigned int block, lastblock;
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block = sector / CONFIG_SYS_NAND_BLOCK_SIZE;
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lastblock = (sector + offs) / CONFIG_SYS_NAND_BLOCK_SIZE;
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while (block <= lastblock) {
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if (nand_is_bad_block(block)) {
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offs += CONFIG_SYS_NAND_BLOCK_SIZE;
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lastblock++;
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}
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block++;
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}
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return offs;
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}
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#ifdef CONFIG_SPL_UBI
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/*
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* Temporary storage for non NAND page aligned and non NAND page sized
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* reads. Note: This does not support runtime detected FLASH yet, but
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* that should be reasonably easy to fix by making the buffer large
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* enough :)
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*/
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static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];
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/**
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* nand_spl_read_block - Read data from physical eraseblock into a buffer
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* @block: Number of the physical eraseblock
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* @offset: Data offset from the start of @peb
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* @len: Data size to read
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* @dst: Address of the destination buffer
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*
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* This could be further optimized if we'd have a subpage read
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* function in the simple code. On NAND which allows subpage reads
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* this would spare quite some time to readout e.g. the VID header of
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* UBI.
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*
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* Notes:
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* @offset + @len are not allowed to be larger than a physical
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* erase block. No sanity check done for simplicity reasons.
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*
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* To support runtime detected flash this needs to be extended by
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* information about the actual flash geometry, but thats beyond the
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* scope of this effort and for most applications where fast boot is
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* required it is not an issue anyway.
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*/
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int nand_spl_read_block(int block, int offset, int len, void *dst)
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{
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int page, read;
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/* Calculate the page number */
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page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
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/* Offset to the start of a flash page */
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offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
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while (len) {
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/*
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* Non page aligned reads go to the scratch buffer.
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* Page aligned reads go directly to the destination.
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*/
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if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
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nand_read_page(block, page, scratch_buf);
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read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
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memcpy(dst, scratch_buf + offset, read);
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offset = 0;
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} else {
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nand_read_page(block, page, dst);
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read = CONFIG_SYS_NAND_PAGE_SIZE;
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}
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page++;
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len -= read;
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dst += read;
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}
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return 0;
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}
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#endif
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