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![Michal Simek](/assets/img/avatar_default.png)
Xilinx ZynqMP platform is passing information to ATF in private format and ATF bl31 parameters are not used. That's why enable option to rewrite this function by platform specific implementation. The patch also move and update kernel-doc format with missing parameters. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
185 lines
5.3 KiB
C
185 lines
5.3 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Reference to the ARM TF Project,
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* plat/arm/common/arm_bl2_setup.c
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* Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights
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* reserved.
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* Copyright (C) 2016 Rockchip Electronic Co.,Ltd
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* Written by Kever Yang <kever.yang@rock-chips.com>
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* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
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*/
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#include <common.h>
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#include <atf_common.h>
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#include <cpu_func.h>
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#include <errno.h>
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#include <spl.h>
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static struct bl2_to_bl31_params_mem bl31_params_mem;
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static struct bl31_params *bl2_to_bl31_params;
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__weak struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry,
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uintptr_t bl33_entry,
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uintptr_t fdt_addr)
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{
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struct entry_point_info *bl32_ep_info;
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struct entry_point_info *bl33_ep_info;
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/*
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* Initialise the memory for all the arguments that needs to
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* be passed to BL31
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*/
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memset(&bl31_params_mem, 0, sizeof(struct bl2_to_bl31_params_mem));
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/* Assign memory for TF related information */
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bl2_to_bl31_params = &bl31_params_mem.bl31_params;
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SET_PARAM_HEAD(bl2_to_bl31_params, ATF_PARAM_BL31, ATF_VERSION_1, 0);
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/* Fill BL31 related information */
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bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info;
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SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
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ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
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/* Fill BL32 related information */
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bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
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bl32_ep_info = &bl31_params_mem.bl32_ep_info;
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SET_PARAM_HEAD(bl32_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
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ATF_EP_SECURE);
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/* secure payload is optional, so set pc to 0 if absent */
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bl32_ep_info->args.arg3 = fdt_addr;
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bl32_ep_info->pc = bl32_entry ? bl32_entry : 0;
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bl32_ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
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DISABLE_ALL_EXECPTIONS);
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bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
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SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
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ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
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/* Fill BL33 related information */
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bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
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bl33_ep_info = &bl31_params_mem.bl33_ep_info;
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SET_PARAM_HEAD(bl33_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
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ATF_EP_NON_SECURE);
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/* BL33 expects to receive the primary CPU MPID (through x0) */
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bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
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bl33_ep_info->pc = bl33_entry;
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bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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DISABLE_ALL_EXECPTIONS);
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bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
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SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info,
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ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
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return bl2_to_bl31_params;
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}
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static inline void raw_write_daif(unsigned int daif)
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{
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__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
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}
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typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
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static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
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uintptr_t bl33_entry, uintptr_t fdt_addr)
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{
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struct bl31_params *bl31_params;
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atf_entry_t atf_entry = (atf_entry_t)bl31_entry;
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bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry,
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fdt_addr);
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raw_write_daif(SPSR_EXCEPTION_MASK);
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dcache_disable();
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atf_entry((void *)bl31_params, (void *)fdt_addr);
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}
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static int spl_fit_images_find(void *blob, int os)
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{
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int parent, node, ndepth = 0;
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const void *data;
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if (!blob)
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return -FDT_ERR_BADMAGIC;
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parent = fdt_path_offset(blob, "/fit-images");
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if (parent < 0)
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return -FDT_ERR_NOTFOUND;
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for (node = fdt_next_node(blob, parent, &ndepth);
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(node >= 0) && (ndepth > 0);
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node = fdt_next_node(blob, node, &ndepth)) {
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if (ndepth != 1)
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continue;
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data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
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if (!data)
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continue;
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if (genimg_get_os_id(data) == os)
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return node;
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};
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return -FDT_ERR_NOTFOUND;
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}
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uintptr_t spl_fit_images_get_entry(void *blob, int node)
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{
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ulong val;
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val = fdt_getprop_u32(blob, node, "entry-point");
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if (val == FDT_ERROR)
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val = fdt_getprop_u32(blob, node, "load-addr");
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debug("%s: entry point 0x%lx\n", __func__, val);
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return val;
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}
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void spl_invoke_atf(struct spl_image_info *spl_image)
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{
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uintptr_t bl32_entry = 0;
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uintptr_t bl33_entry = CONFIG_SYS_TEXT_BASE;
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void *blob = spl_image->fdt_addr;
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uintptr_t platform_param = (uintptr_t)blob;
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int node;
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/*
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* Find the OP-TEE binary (in /fit-images) load address or
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* entry point (if different) and pass it as the BL3-2 entry
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* point, this is optional.
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*/
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node = spl_fit_images_find(blob, IH_OS_TEE);
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if (node >= 0)
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bl32_entry = spl_fit_images_get_entry(blob, node);
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/*
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* Find the U-Boot binary (in /fit-images) load addreess or
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* entry point (if different) and pass it as the BL3-3 entry
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* point.
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* This will need to be extended to support Falcon mode.
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*/
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node = spl_fit_images_find(blob, IH_OS_U_BOOT);
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if (node >= 0)
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bl33_entry = spl_fit_images_get_entry(blob, node);
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/*
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* If ATF_NO_PLATFORM_PARAM is set, we override the platform
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* parameter and always pass 0. This is a workaround for
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* older ATF versions that have insufficiently robust (or
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* overzealous) argument validation.
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*/
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if (CONFIG_IS_ENABLED(ATF_NO_PLATFORM_PARAM))
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platform_param = 0;
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/*
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* We don't provide a BL3-2 entry yet, but this will be possible
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* using similar logic.
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*/
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bl31_entry(spl_image->entry_point, bl32_entry,
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bl33_entry, platform_param);
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}
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