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![Dirk Behme](/assets/img/avatar_default.png)
As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not function local. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
210 lines
5.2 KiB
C
210 lines
5.2 KiB
C
/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Parts are shamelessly stolen from various TI sources, original copyright
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* follows:
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* -----------------------------------------------------------------
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*
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* Copyright (C) 2004 Texas Instruments.
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*
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* ----------------------------------------------------------------------------
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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* ----------------------------------------------------------------------------
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emac_defs.h>
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#define MACH_TYPE_DAVINCI_EVM 901
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DECLARE_GLOBAL_DATA_PTR;
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extern void i2c_init(int speed, int slaveaddr);
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extern void timer_init(void);
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extern int eth_hw_init(void);
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extern phy_t phy;
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/* Works on Always On power domain only (no PD argument) */
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void lpsc_on(unsigned int id)
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{
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dv_reg_p mdstat, mdctl;
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if (id >= DAVINCI_LPSC_GEM)
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return; /* Don't work on DSP Power Domain */
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mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
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mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
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while (REG(PSC_PTSTAT) & 0x01) {;}
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if ((*mdstat & 0x1f) == 0x03)
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return; /* Already on and enabled */
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*mdctl |= 0x03;
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/* Special treatment for some modules as for sprue14 p.7.4.2 */
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if ( (id == DAVINCI_LPSC_VPSSSLV) ||
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(id == DAVINCI_LPSC_EMAC) ||
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(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
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(id == DAVINCI_LPSC_MDIO) ||
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(id == DAVINCI_LPSC_USB) ||
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(id == DAVINCI_LPSC_ATA) ||
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(id == DAVINCI_LPSC_VLYNQ) ||
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(id == DAVINCI_LPSC_UHPI) ||
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(id == DAVINCI_LPSC_DDR_EMIF) ||
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(id == DAVINCI_LPSC_AEMIF) ||
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(id == DAVINCI_LPSC_MMC_SD) ||
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(id == DAVINCI_LPSC_MEMSTICK) ||
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(id == DAVINCI_LPSC_McBSP) ||
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(id == DAVINCI_LPSC_GPIO)
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)
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*mdctl |= 0x200;
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REG(PSC_PTCMD) = 0x01;
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while (REG(PSC_PTSTAT) & 0x03) {;}
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while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
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}
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void dsp_on(void)
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{
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int i;
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if (REG(PSC_PDSTAT1) & 0x1f)
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return; /* Already on */
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REG(PSC_GBLCTL) |= 0x01;
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REG(PSC_PDCTL1) |= 0x01;
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REG(PSC_PDCTL1) &= ~0x100;
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REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
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REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
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REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
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REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
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REG(PSC_PTCMD) = 0x02;
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for (i = 0; i < 100; i++) {
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if (REG(PSC_EPCPR) & 0x02)
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break;
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}
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REG(PSC_CHP_SHRTSW) = 0x01;
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REG(PSC_PDCTL1) |= 0x100;
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REG(PSC_EPCCR) = 0x02;
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for (i = 0; i < 100; i++) {
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if (!(REG(PSC_PTSTAT) & 0x02))
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break;
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}
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REG(PSC_GBLCTL) &= ~0x1f;
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}
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int board_init(void)
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{
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/* Workaround for TMS320DM6446 errata 1.3.22 */
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REG(PSC_SILVER_BULLET) = 0;
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/* Power on required peripherals */
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lpsc_on(DAVINCI_LPSC_EMAC);
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lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
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lpsc_on(DAVINCI_LPSC_MDIO);
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lpsc_on(DAVINCI_LPSC_I2C);
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lpsc_on(DAVINCI_LPSC_UART0);
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lpsc_on(DAVINCI_LPSC_TIMER1);
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lpsc_on(DAVINCI_LPSC_GPIO);
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/* Powerup the DSP */
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dsp_on();
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/* Bringup UART0 out of reset */
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REG(UART0_PWREMU_MGMT) = 0x0000e003;
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/* Enable GIO3.3V cells used for EMAC */
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REG(VDD3P3V_PWDN) = 0;
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/* Enable UART0 MUX lines */
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REG(PINMUX1) |= 1;
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/* Enable EMAC and AEMIF pins */
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REG(PINMUX0) = 0x80000c1f;
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/* Enable I2C pin Mux */
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REG(PINMUX1) |= (1 << 7);
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/* Set the Bus Priority Register to appropriate value */
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REG(VBPR) = 0x20;
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timer_init();
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return(0);
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}
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int misc_init_r (void)
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{
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u_int8_t tmp[20], buf[10];
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int i = 0;
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int clk = 0;
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clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
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printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
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printf ("DDR Clock : %dMHz\n", (clk / 2));
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/* Set Ethernet MAC address from EEPROM */
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if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
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printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
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} else {
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tmp[0] = 0xff;
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for (i = 0; i < 6; i++)
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tmp[0] &= buf[i];
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if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
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sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
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buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
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setenv("ethaddr", (char *)&tmp[0]);
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}
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}
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if (!eth_hw_init()) {
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printf("ethernet init failed!\n");
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} else {
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printf("ETH PHY : %s\n", phy.name);
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}
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i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);
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setenv ("videostd", ((i & 0x80) ? "pal" : "ntsc"));
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return(0);
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return(0);
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}
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