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https://github.com/brain-hackers/u-boot-brain
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280057bd7d
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
81 lines
1.4 KiB
C
81 lines
1.4 KiB
C
/*
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* (C) Copyright 2016
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* Vikas Manocha, <vikas.manocha@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <ram.h>
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#include <asm/io.h>
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#include <asm/armv7m.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/gpio.h>
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#include <dm/platdata.h>
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#include <dm/platform_data/serial_stm32x7.h>
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#include <asm/arch/stm32_periph.h>
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#include <asm/arch/stm32_defs.h>
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#include <asm/arch/syscfg.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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struct udevice *dev;
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struct ram_info ram;
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int rv;
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rv = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (rv) {
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debug("DRAM init failed: %d\n", rv);
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return rv;
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}
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rv = ram_get_info(dev, &ram);
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if (rv) {
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debug("Cannot get DRAM size: %d\n", rv);
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return rv;
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}
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debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
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gd->ram_size = ram.size;
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/*
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* Fill in global info with description of SRAM configuration
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*/
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gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
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gd->bd->bi_dram[0].size = ram.size;
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return rv;
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}
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#ifdef CONFIG_ETH_DESIGNWARE
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static int stmmac_setup(void)
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{
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clock_setup(SYSCFG_CLOCK_CFG);
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/* Set >RMII mode */
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STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
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clock_setup(STMMAC_CLOCK_CFG);
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return 0;
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}
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int board_early_init_f(void)
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{
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stmmac_setup();
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return 0;
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}
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#endif
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u32 get_board_rev(void)
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{
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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