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8975cdf4bc
Make DRAM_ODT_EN Kconfig setting a bool, add a separate DRAM_ODT_CORRECTION setting for A23 SoCs and use DRAM_ODT_EN Kconfig everywhere instead of only in dram_sun4i.c and hardcoding odt_en elsewhere. Note this commit makes no functional changes for existing boards, its purpose is to allow changing the odt_en value on future A33 boards. For sun4i/sun5i/sun7i boards which set DRAM_ODT_EN=y (which no defconfigs currently do) this patch turns on odt for both the DQ and the DQS lines, whereas previously it was possibly (but not desirable) to turn odt on only for one of them by setting the in DRAM_ODT_EN option to 1 or 2 instead of 3. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
37 lines
700 B
C
37 lines
700 B
C
#include <common.h>
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#include <asm/arch/dram.h>
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#include <linux/kconfig.h>
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static struct dram_para dram_para = {
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.clock = CONFIG_DRAM_CLK,
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.type = 3,
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.rank_num = 1,
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.density = 0,
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.io_width = 0,
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.bus_width = 0,
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.zq = CONFIG_DRAM_ZQ,
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.odt_en = IS_ENABLED(CONFIG_DRAM_ODT_EN),
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.size = 0,
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#ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC
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.cas = 6,
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.tpr0 = 0x30926692,
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.tpr1 = 0x1090,
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.tpr2 = 0x1a0c8,
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.emr2 = 0,
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#else
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# include "dram_timings_sun4i.h"
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.active_windowing = 1,
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#endif
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.tpr3 = CONFIG_DRAM_TPR3,
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.tpr4 = 0,
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.tpr5 = 0,
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.emr1 = CONFIG_DRAM_EMR1,
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.emr3 = 0,
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.dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY,
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};
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unsigned long sunxi_dram_init(void)
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{
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return dramc_init(&dram_para);
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}
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