mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-14 00:33:31 +09:00
456ee909d6
On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated into the SoC which is enabled by the FSP. Remove the smsc47x superio initialization codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
||
---|---|---|
.. | ||
crownbay | ||
galileo | ||
minnowmax | ||
Kconfig |