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https://github.com/brain-hackers/u-boot-brain
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91600a6a84
The ESM handling on J7 processor board requires routing the MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety error handling. The PMIC itself should then reset the board based on receiving it. Enable the support for the board by adding the esm node in place. Signed-off-by: Tero Kristo <t-kristo@ti.com>
35 lines
465 B
Plaintext
35 lines
465 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/ {
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chosen {
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firmware-loader = &fs_loader0;
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};
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fs_loader0: fs_loader@0 {
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u-boot,dm-pre-reloc;
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compatible = "u-boot,fs-loader";
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};
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};
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&main_r5fss0 {
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u-boot,dm-spl;
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};
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&main_r5fss0_core0 {
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u-boot,dm-spl;
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};
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&main_r5fss0_core1 {
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u-boot,dm-spl;
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};
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&tps659413a {
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esm: esm {
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compatible = "ti,tps659413-esm";
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u-boot,dm-spl;
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};
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};
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