mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
67171e13a3
rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK3036_COMMON_H
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#define __CONFIG_RK3036_COMMON_H
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#include <asm/arch/hardware.h>
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
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#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_TEXT_BASE 0x60000000
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#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
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#define CONFIG_SYS_LOAD_ADDR 0x60800800
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#define CONFIG_SPL_STACK 0x10081fff
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#define CONFIG_SPL_TEXT_BASE 0x10081004
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#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
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#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
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/* MMC/SD IP block */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DWMMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_FAT_WRITE
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#define CONFIG_PARTITION_UUIDS
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#define CONFIG_CMD_PART
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#define CONFIG_SYS_SDRAM_BASE 0x60000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define SDRAM_BANK_SIZE (512UL << 20UL)
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI
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#define CONFIG_SPI_FLASH_GIGADEVICE
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#ifndef CONFIG_SPL_BUILD
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/* usb otg */
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET_DWC2_OTG
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#define CONFIG_USB_GADGET_VBUS_DRAW 0
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/* fastboot */
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_USB_FUNCTION_FASTBOOT
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#define CONFIG_FASTBOOT_FLASH
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#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
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#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
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#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_CMD_USB_MASS_STORAGE
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#define CONFIG_USB_GADGET_DOWNLOAD
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#define CONFIG_G_DNL_MANUFACTURER "Rockchip"
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#define CONFIG_G_DNL_VENDOR_NUM 0x2207
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#define CONFIG_G_DNL_PRODUCT_NUM 0x310a
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/* Enable gpt partition table */
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#define CONFIG_CMD_GPT
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#include <config_distro_defaults.h>
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x60000000\0" \
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"pxefile_addr_r=0x60100000\0" \
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"fdt_addr_r=0x61f00000\0" \
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"kernel_addr_r=0x62000000\0" \
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"ramdisk_addr_r=0x64000000\0"
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#define CONFIG_RANDOM_UUID
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
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"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
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/* First try to boot from SD (index 0), then eMMC (index 1 */
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1)
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#include <config_distro_bootcmd.h>
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/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
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* so limit the fdt reallocation to that */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0x7fffffff\0" \
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"partitions=" PARTS_DEFAULT \
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ENV_MEM_LAYOUT_SETTINGS \
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BOOTENV
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#endif
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_PREBOOT
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#endif
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