Siva Durga Prasad Paladugu 26e054c943 arm64: versal: fpga: Add PL bit stream load support ... This patch adds PL bitstream load support for Versal platform. The PL bitstream is loaded by making an SMC to ATF which in turn communicates with platform firmware which configures and loads PL bitstream on to PL. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2019-10-08 09:11:14 +02:00
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ACEX1K.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
altera.c	arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table	2018-12-20 17:12:25 +01:00
cyclon2.c	fpga: altera: cyclon2: Check function pointer before calling	2019-07-30 10:21:15 +02:00
fpga.c	cmd: fpga: Add support to load secure bitstreams	2018-06-01 11:37:31 +02:00
ivm_core.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Kconfig	arm64: versal: fpga: Add PL bit stream load support	2019-10-08 09:11:14 +02:00
lattice.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Makefile	arm64: versal: fpga: Add PL bit stream load support	2019-10-08 09:11:14 +02:00
socfpga_arria10.c	fpga: arria10: Fix error in fpga pin configuration	2019-07-21 12:47:13 +02:00
socfpga_gen5.c	arm: socfpga: fpga: fix type of local variable	2018-10-31 01:41:10 +01:00
socfpga.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
spartan2.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
spartan3.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
stratix10.c	ARM: socfpga: stratix10: Return valid error code from FPGA driver	2019-02-18 13:00:54 +01:00
stratixII.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
stratixv.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
versalpl.c	arm64: versal: fpga: Add PL bit stream load support	2019-10-08 09:11:14 +02:00
virtex2.c	fpga: virtex2: Add slave serial programming support	2019-07-30 10:20:06 +02:00
xilinx.c	arm64: versal: fpga: Add PL bit stream load support	2019-10-08 09:11:14 +02:00
zynqmppl.c	fpga: zynqmp: show an error message when FPGA programming fails	2019-01-24 10:03:43 +01:00
zynqpl.c	arm: zynq: Add an info message about post config	2019-04-16 11:51:34 +02:00