mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-23 10:28:51 +09:00
215 lines
4.4 KiB
C
215 lines
4.4 KiB
C
/*
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* Copyright (C) 2009
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* Marek Vasut <marek.vasut@gmail.com>
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*
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* Heavily based on pxa255_idp platform
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <serial.h>
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#include <asm/arch/hardware.h>
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#include <spi.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_SPI
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void lcd_start(void);
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#else
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inline void lcd_start(void) {};
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#endif
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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/* arch number of Z2 */
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gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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/* Enable LCD */
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lcd_start();
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return 0;
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}
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struct serial_device *default_serial_console (void)
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{
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return &serial_stuart_device;
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}
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extern void pxa_dram_init(void);
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int dram_init(void)
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{
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pxa_dram_init();
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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#ifdef CONFIG_CMD_SPI
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struct {
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unsigned char reg;
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unsigned short data;
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unsigned char mdelay;
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} lcd_data[] = {
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{ 0x07, 0x0000, 0 },
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{ 0x13, 0x0000, 10 },
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{ 0x11, 0x3004, 0 },
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{ 0x14, 0x200F, 0 },
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{ 0x10, 0x1a20, 0 },
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{ 0x13, 0x0040, 50 },
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{ 0x13, 0x0060, 0 },
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{ 0x13, 0x0070, 200 },
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{ 0x01, 0x0127, 0 },
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{ 0x02, 0x0700, 0 },
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{ 0x03, 0x1030, 0 },
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{ 0x08, 0x0208, 0 },
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{ 0x0B, 0x0620, 0 },
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{ 0x0C, 0x0110, 0 },
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{ 0x30, 0x0120, 0 },
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{ 0x31, 0x0127, 0 },
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{ 0x32, 0x0000, 0 },
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{ 0x33, 0x0503, 0 },
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{ 0x34, 0x0727, 0 },
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{ 0x35, 0x0124, 0 },
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{ 0x36, 0x0706, 0 },
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{ 0x37, 0x0701, 0 },
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{ 0x38, 0x0F00, 0 },
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{ 0x39, 0x0F00, 0 },
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{ 0x40, 0x0000, 0 },
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{ 0x41, 0x0000, 0 },
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{ 0x42, 0x013f, 0 },
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{ 0x43, 0x0000, 0 },
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{ 0x44, 0x013f, 0 },
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{ 0x45, 0x0000, 0 },
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{ 0x46, 0xef00, 0 },
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{ 0x47, 0x013f, 0 },
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{ 0x48, 0x0000, 0 },
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{ 0x07, 0x0015, 30 },
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{ 0x07, 0x0017, 0 },
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{ 0x20, 0x0000, 0 },
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{ 0x21, 0x0000, 0 },
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{ 0x22, 0x0000, 0 },
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};
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void zipitz2_spi_sda(int set)
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{
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/* GPIO 13 */
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if (set)
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writel((1 << 13), GPSR0);
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else
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writel((1 << 13), GPCR0);
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}
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void zipitz2_spi_scl(int set)
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{
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/* GPIO 22 */
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if (set)
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writel((1 << 22), GPCR0);
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else
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writel((1 << 22), GPSR0);
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}
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unsigned char zipitz2_spi_read(void)
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{
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/* GPIO 40 */
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return !!(readl(GPLR1) & (1 << 8));
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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/* Always valid */
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return 1;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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/* GPIO 88 low */
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writel((1 << 24), GPCR2);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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/* GPIO 88 high */
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writel((1 << 24), GPSR2);
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}
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void lcd_start(void)
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{
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int i;
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unsigned char reg[3] = { 0x74, 0x00, 0 };
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unsigned char data[3] = { 0x76, 0, 0 };
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unsigned char dummy[3] = { 0, 0, 0 };
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/* PWM2 AF */
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writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
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/* Enable clock to all PWM */
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writel(readl(CKEN) | 0x3, CKEN);
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/* Configure PWM2 */
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writel(0x4f, PWM_CTRL2);
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writel(0x2ff, PWM_PWDUTY2);
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writel(792, PWM_PERVAL2);
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/* Toggle the reset pin to reset the LCD */
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writel((1 << 19), GPSR0);
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udelay(100000);
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writel((1 << 19), GPCR0);
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udelay(20000);
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writel((1 << 19), GPSR0);
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udelay(20000);
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/* Program the LCD init sequence */
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for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
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reg[0] = 0x74;
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reg[1] = 0x0;
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reg[2] = lcd_data[i].reg;
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spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
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data[0] = 0x76;
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data[1] = lcd_data[i].data >> 8;
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data[2] = lcd_data[i].data & 0xff;
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spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
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if (lcd_data[i].mdelay)
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udelay(lcd_data[i].mdelay * 1000);
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}
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writel((1 << 11), GPSR0);
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}
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#endif
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