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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-17 23:48:52 +09:00
![ramneek mehresh](/assets/img/avatar_default.png)
Remove getting values of usb mode and phy_type from "usb_dr_mode" and "usb_phy_type" uboot env variables. Now, these are determined only from hwconfig string Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
427 lines
11 KiB
C
427 lines
11 KiB
C
/*
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* Copyright 2009-2012 Freescale Semiconductor, Inc.
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*
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* This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
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* arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
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* cpu specific common code for 85xx/86xx processors.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/mp.h>
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#include <asm/fsl_serdes.h>
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#include <phy.h>
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#include <hwconfig.h>
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#define FSL_MAX_NUM_USB_CTRLS 2
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
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static int ft_del_cpuhandle(void *blob, int cpuhandle)
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{
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int off, ret = -FDT_ERR_NOTFOUND;
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/* if we find a match, we'll delete at it which point the offsets are
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* invalid so we start over from the beginning
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*/
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off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
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&cpuhandle, 4);
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while (off != -FDT_ERR_NOTFOUND) {
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fdt_delprop(blob, off, "cpu-handle");
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ret = 1;
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off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
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&cpuhandle, 4);
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}
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return ret;
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}
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void ft_fixup_num_cores(void *blob) {
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int off, num_cores, del_cores;
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del_cores = 0;
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num_cores = cpu_numcores();
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off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
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while (off != -FDT_ERR_NOTFOUND) {
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u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
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u32 phys_cpu_id = thread_to_core(*reg);
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if (!is_core_valid(phys_cpu_id) || is_core_disabled(phys_cpu_id)) {
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int ph = fdt_get_phandle(blob, off);
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/* Delete the cpu node once there are no cpu handles */
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if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) {
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fdt_del_node(blob, off);
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del_cores++;
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}
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/* either we deleted some cpu handles or the cpu node
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* so we reset the offset back to the start since we
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* can't trust the offsets anymore
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*/
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off = -1;
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}
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off = fdt_node_offset_by_prop_value(blob, off,
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"device_type", "cpu", 4);
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}
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debug ("%x core system found\n", num_cores);
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debug ("deleted %d extra core entry entries from device tree\n",
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del_cores);
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}
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#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
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#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
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static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
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const char *phy_type, int start_offset)
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{
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const char *compat_dr = "fsl-usb2-dr";
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const char *compat_mph = "fsl-usb2-mph";
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const char *prop_mode = "dr_mode";
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const char *prop_type = "phy_type";
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const char *node_type = NULL;
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int node_offset;
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int err;
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node_offset = fdt_node_offset_by_compatible(blob,
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start_offset, compat_mph);
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if (node_offset < 0) {
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node_offset = fdt_node_offset_by_compatible(blob,
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start_offset, compat_dr);
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if (node_offset < 0) {
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printf("WARNING: could not find compatible"
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" node %s or %s: %s.\n", compat_mph,
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compat_dr, fdt_strerror(node_offset));
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return -1;
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} else
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node_type = compat_dr;
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} else
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node_type = compat_mph;
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if (mode) {
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err = fdt_setprop(blob, node_offset, prop_mode, mode,
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strlen(mode) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_mode, node_type, fdt_strerror(err));
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}
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if (phy_type) {
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err = fdt_setprop(blob, node_offset, prop_type, phy_type,
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strlen(phy_type) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_type, node_type, fdt_strerror(err));
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}
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return node_offset;
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}
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void fdt_fixup_dr_usb(void *blob, bd_t *bd)
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{
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const char *modes[] = { "host", "peripheral", "otg" };
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const char *phys[] = { "ulpi", "utmi" };
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const char *dr_mode_type = NULL;
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const char *dr_phy_type = NULL;
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int usb_mode_off = -1;
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int usb_phy_off = -1;
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char str[5];
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int i, j;
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for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) {
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int mode_idx = -1, phy_idx = -1;
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snprintf(str, 5, "%s%d", "usb", i);
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if (hwconfig(str)) {
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for (j = 0; j < ARRAY_SIZE(modes); j++) {
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if (hwconfig_subarg_cmp(str, "dr_mode",
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modes[j])) {
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mode_idx = j;
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break;
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}
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}
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for (j = 0; j < ARRAY_SIZE(phys); j++) {
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if (hwconfig_subarg_cmp(str, "phy_type",
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phys[j])) {
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phy_idx = j;
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break;
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}
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}
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if (mode_idx < 0 || phy_idx < 0) {
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puts("ERROR: wrong usb mode/phy defined!!\n");
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return;
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}
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dr_mode_type = modes[mode_idx];
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dr_phy_type = phys[phy_idx];
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if (mode_idx < 0 && phy_idx < 0) {
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printf("WARNING: invalid phy or mode\n");
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return;
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}
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}
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usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
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dr_mode_type, NULL, usb_mode_off);
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if (usb_mode_off < 0)
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return;
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usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
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NULL, dr_phy_type, usb_phy_off);
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if (usb_phy_off < 0)
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return;
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}
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}
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#endif /* defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) */
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/*
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* update crypto node properties to a specified revision of the SEC
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* called with sec_rev == 0 if not on an E processor
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*/
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#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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static const struct sec_rev_prop {
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u32 sec_rev;
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u32 num_channels;
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u32 channel_fifo_len;
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u32 exec_units_mask;
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u32 descriptor_types_mask;
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} sec_rev_prop_list [] = {
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{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
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{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
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{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
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{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
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{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
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{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
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{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
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};
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static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
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sizeof("fsl,secX.Y")];
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int crypto_node, sec_idx, err;
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char *p;
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u32 val;
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/* locate crypto node based on lowest common compatible */
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crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
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if (crypto_node == -FDT_ERR_NOTFOUND)
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return;
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/* delete it if not on an E-processor */
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if (crypto_node > 0 && !sec_rev) {
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fdt_del_node(blob, crypto_node);
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return;
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}
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/* else we got called for possible uprev */
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for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
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if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
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break;
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if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
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puts("warning: unknown SEC revision number\n");
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return;
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}
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
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err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
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err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
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err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
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err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = 0;
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while (sec_idx >= 0) {
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p = compat_strlist + val;
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val += sprintf(p, "fsl,sec%d.%d",
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(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
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sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
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sec_idx--;
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}
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err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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}
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#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
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static u8 caam_get_era(void)
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{
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static const struct {
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u16 ip_id;
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u8 maj_rev;
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u8 era;
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} caam_eras[] = {
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{0x0A10, 1, 1},
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{0x0A10, 2, 2},
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{0x0A12, 1, 3},
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{0x0A14, 1, 3},
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{0x0A14, 2, 4},
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{0x0A16, 1, 4},
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{0x0A10, 3, 4},
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{0x0A11, 1, 4},
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{0x0A18, 1, 4},
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{0x0A11, 2, 5},
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{0x0A12, 2, 5},
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{0x0A13, 1, 5},
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{0x0A1C, 1, 5}
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};
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ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
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u32 secvid_ms = in_be32(&sec->secvid_ms);
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u32 ccbvid = in_be32(&sec->ccbvid);
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u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
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SEC_SECVID_MS_IPID_SHIFT;
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u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
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SEC_SECVID_MS_MAJ_REV_SHIFT;
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u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
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int i;
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if (era) /* This is '0' prior to CAAM ERA-6 */
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return era;
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for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
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if (caam_eras[i].ip_id == ip_id &&
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caam_eras[i].maj_rev == maj_rev)
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return caam_eras[i].era;
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return 0;
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}
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static void fdt_fixup_crypto_era(void *blob, u32 era)
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{
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int err;
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int crypto_node;
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crypto_node = fdt_path_offset(blob, "crypto");
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if (crypto_node < 0) {
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printf("WARNING: Missing crypto node\n");
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return;
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}
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err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
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sizeof(era));
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if (err < 0) {
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printf("ERROR: could not set fsl,sec-era property: %s\n",
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fdt_strerror(err));
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}
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}
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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u8 era;
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if (!sec_rev) {
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fdt_del_node_and_alias(blob, "crypto");
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return;
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}
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/* Add SEC ERA information in compatible */
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era = caam_get_era();
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if (era) {
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fdt_fixup_crypto_era(blob, era);
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} else {
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printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
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sec_rev);
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}
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}
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#endif
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int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
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{
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return fdt_setprop_string(blob, offset, "phy-connection-type",
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phy_string_for_interface(phyc));
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}
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#ifdef CONFIG_SYS_SRIO
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static inline void ft_disable_srio_port(void *blob, int srio_off, int port)
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{
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int off = fdt_node_offset_by_prop_value(blob, srio_off,
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"cell-index", &port, 4);
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if (off >= 0) {
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off = fdt_setprop_string(blob, off, "status", "disabled");
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if (off > 0)
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printf("WARNING unable to set status for fsl,srio "
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"port %d: %s\n", port, fdt_strerror(off));
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}
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}
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static inline void ft_disable_rman(void *blob)
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{
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int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman");
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if (off >= 0) {
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off = fdt_setprop_string(blob, off, "status", "disabled");
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if (off > 0)
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printf("WARNING unable to set status for fsl,rman %s\n",
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fdt_strerror(off));
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}
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}
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static inline void ft_disable_rmu(void *blob)
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{
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int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
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if (off >= 0) {
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off = fdt_setprop_string(blob, off, "status", "disabled");
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if (off > 0)
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printf("WARNING unable to set status for "
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"fsl,srio-rmu %s\n", fdt_strerror(off));
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}
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}
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void ft_srio_setup(void *blob)
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{
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int srio1_used = 0, srio2_used = 0;
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int srio_off;
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/* search for srio node, if doesn't exist just return - nothing todo */
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srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
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if (srio_off < 0)
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return ;
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#ifdef CONFIG_SRIO1
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if (is_serdes_configured(SRIO1))
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srio1_used = 1;
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#endif
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#ifdef CONFIG_SRIO2
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if (is_serdes_configured(SRIO2))
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srio2_used = 1;
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#endif
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/* mark port1 disabled */
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if (!srio1_used)
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ft_disable_srio_port(blob, srio_off, 1);
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/* mark port2 disabled */
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if (!srio2_used)
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ft_disable_srio_port(blob, srio_off, 2);
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/* if both ports not used, disable controller, rmu and rman */
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if (!srio1_used && !srio2_used) {
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fdt_setprop_string(blob, srio_off, "status", "disabled");
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ft_disable_rman(blob);
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ft_disable_rmu(blob);
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}
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}
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#endif
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