mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-30 22:08:52 +09:00
![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
648 lines
16 KiB
C
648 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* board.c
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*
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* (C) Copyright 2016
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* Board functions for TI AM335X based boards
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*/
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#include <common.h>
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#include <errno.h>
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#include <spl.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mem.h>
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#include <asm/io.h>
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#include <asm/emif.h>
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#include <asm/gpio.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <cpsw.h>
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#include <power/tps65217.h>
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#include <environment.h>
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#include <watchdog.h>
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#include <environment.h>
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#include "mmc.h"
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#include "board.h"
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_SPL_BUILD) || \
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(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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#endif
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static struct shc_eeprom __attribute__((section(".data"))) header;
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static int shc_eeprom_valid;
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/*
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* Read header information from EEPROM into global structure.
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*/
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static int read_eeprom(void)
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{
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/* Check if baseboard eeprom is available */
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if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
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puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
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return -ENODEV;
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}
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/* read the eeprom using i2c */
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if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
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sizeof(header))) {
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puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
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return -EIO;
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}
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if (header.magic != HDR_MAGIC) {
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printf("Incorrect magic number (0x%x) in EEPROM\n",
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header.magic);
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return -EIO;
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}
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shc_eeprom_valid = 1;
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return 0;
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}
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static void shc_request_gpio(void)
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{
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gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
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gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
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gpio_request(RESET_GPIO, "reset");
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gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
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gpio_request(WIFI_RST_GPIO, "WIFI rst");
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gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
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gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
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gpio_request(ENOC_RST_GPIO, "ENOC rst");
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#if defined CONFIG_B_SAMPLE
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gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
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gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
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gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
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gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
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#else
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gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
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gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
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gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
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gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
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gpio_request(LED_PWM_GPIO, "LED PWM");
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gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
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#endif
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gpio_request(BACK_BUTTON_GPIO, "Back button");
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gpio_request(FRONT_BUTTON_GPIO, "Front button");
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}
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/*
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* Function which forces all installed modules into running state for ICT
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* testing. Called by SPL.
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*/
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static void __maybe_unused force_modules_running(void)
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{
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/* Wi-Fi power regulator enable - high = enabled */
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gpio_direction_output(WIFI_REGEN_GPIO, 1);
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/*
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* Wait for Wi-Fi power regulator to reach a stable voltage
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* (soft-start time, max. 350 µs)
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*/
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__udelay(350);
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/* Wi-Fi module reset - high = running */
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gpio_direction_output(WIFI_RST_GPIO, 1);
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/* ZigBee reset - high = running */
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gpio_direction_output(ZIGBEE_RST_GPIO, 1);
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/* BidCos reset - high = running */
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gpio_direction_output(BIDCOS_RST_GPIO, 1);
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#if !defined(CONFIG_B_SAMPLE)
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/* Z-Wave reset - high = running */
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gpio_direction_output(Z_WAVE_RST_GPIO, 1);
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#endif
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/* EnOcean reset - low = running */
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gpio_direction_output(ENOC_RST_GPIO, 0);
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}
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/*
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* Function which forces all installed modules into reset - to be released by
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* the OS, called by SPL
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*/
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static void __maybe_unused force_modules_reset(void)
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{
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/* Wi-Fi module reset - low = reset */
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gpio_direction_output(WIFI_RST_GPIO, 0);
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/* Wi-Fi power regulator enable - low = disabled */
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gpio_direction_output(WIFI_REGEN_GPIO, 0);
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/* ZigBee reset - low = reset */
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gpio_direction_output(ZIGBEE_RST_GPIO, 0);
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/* BidCos reset - low = reset */
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/*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
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#if !defined(CONFIG_B_SAMPLE)
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/* Z-Wave reset - low = reset */
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gpio_direction_output(Z_WAVE_RST_GPIO, 0);
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#endif
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/* EnOcean reset - high = reset*/
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gpio_direction_output(ENOC_RST_GPIO, 1);
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}
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/*
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* Function to set the LEDs in the state "Bootloader booting"
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*/
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static void __maybe_unused leds_set_booting(void)
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{
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#if defined(CONFIG_B_SAMPLE)
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/* Turn all red LEDs on */
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gpio_direction_output(LED_PWR_RD_GPIO, 1);
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gpio_direction_output(LED_CONN_RD_GPIO, 1);
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#else /* All other SHCs starting with B2-Sample */
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/* Set the PWM GPIO */
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gpio_direction_output(LED_PWM_GPIO, 1);
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/* Turn all red LEDs on */
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gpio_direction_output(LED_PWR_RD_GPIO, 1);
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gpio_direction_output(LED_LAN_RD_GPIO, 1);
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gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
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#endif
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}
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/*
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* Function to set the LEDs in the state "Bootloader error"
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*/
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static void leds_set_failure(int state)
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{
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#if defined(CONFIG_B_SAMPLE)
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/* Turn all blue and green LEDs off */
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gpio_set_value(LED_PWR_BL_GPIO, 0);
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gpio_set_value(LED_PWR_GN_GPIO, 0);
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gpio_set_value(LED_CONN_BL_GPIO, 0);
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gpio_set_value(LED_CONN_GN_GPIO, 0);
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/* Turn all red LEDs to 'state' */
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gpio_set_value(LED_PWR_RD_GPIO, state);
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gpio_set_value(LED_CONN_RD_GPIO, state);
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#else /* All other SHCs starting with B2-Sample */
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/* Set the PWM GPIO */
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gpio_direction_output(LED_PWM_GPIO, 1);
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/* Turn all blue LEDs off */
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gpio_set_value(LED_PWR_BL_GPIO, 0);
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gpio_set_value(LED_LAN_BL_GPIO, 0);
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gpio_set_value(LED_CLOUD_BL_GPIO, 0);
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/* Turn all red LEDs to 'state' */
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gpio_set_value(LED_PWR_RD_GPIO, state);
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gpio_set_value(LED_LAN_RD_GPIO, state);
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gpio_set_value(LED_CLOUD_RD_GPIO, state);
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#endif
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}
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/*
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* Function to set the LEDs in the state "Bootloader finished"
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*/
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static void leds_set_finish(void)
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{
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#if defined(CONFIG_B_SAMPLE)
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/* Turn all LEDs off */
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gpio_set_value(LED_PWR_BL_GPIO, 0);
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gpio_set_value(LED_PWR_RD_GPIO, 0);
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gpio_set_value(LED_PWR_GN_GPIO, 0);
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gpio_set_value(LED_CONN_BL_GPIO, 0);
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gpio_set_value(LED_CONN_RD_GPIO, 0);
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gpio_set_value(LED_CONN_GN_GPIO, 0);
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#else /* All other SHCs starting with B2-Sample */
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/* Turn all LEDs off */
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gpio_set_value(LED_PWR_BL_GPIO, 0);
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gpio_set_value(LED_PWR_RD_GPIO, 0);
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gpio_set_value(LED_LAN_BL_GPIO, 0);
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gpio_set_value(LED_LAN_RD_GPIO, 0);
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gpio_set_value(LED_CLOUD_BL_GPIO, 0);
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gpio_set_value(LED_CLOUD_RD_GPIO, 0);
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/* Turn off the PWM GPIO and mux it to EHRPWM */
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gpio_set_value(LED_PWM_GPIO, 0);
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enable_shc_board_pwm_pin_mux();
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#endif
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}
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static void check_button_status(void)
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{
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ulong value;
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gpio_direction_input(FRONT_BUTTON_GPIO);
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value = gpio_get_value(FRONT_BUTTON_GPIO);
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if (value == 0) {
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printf("front button activated !\n");
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env_set("harakiri", "1");
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}
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}
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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return 1;
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}
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#endif
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static void shc_board_early_init(void)
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{
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shc_request_gpio();
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# ifdef CONFIG_SHC_ICT
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/* Force all modules into enabled state for ICT testing */
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force_modules_running();
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# else
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/* Force all modules to enter Reset state until released by the OS */
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force_modules_reset();
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# endif
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leds_set_booting();
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}
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#define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
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#define OSC (V_OSCK/1000000)
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/* Bosch: Predivider must be fixed to 4, so N = 4-1 */
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#define MPUPLL_N (4-1)
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/* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
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#define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
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const struct dpll_params dpll_ddr_shc = {
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400, OSC-1, 1, -1, -1, -1, -1};
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const struct dpll_params *get_dpll_ddr_params(void)
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{
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return &dpll_ddr_shc;
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}
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/*
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* As we enabled downspread SSC with 1.8%, the values needed to be corrected
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* such that the 20% overshoot will not lead to too high frequencies.
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* In all cases, this is achieved by subtracting one from M (6 MHz less).
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* Example: 600 MHz CPU
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* Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
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* 600 MHz - 6 MHz (1x Fref) = 594 MHz
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* SSC: 594 MHz * 1.8% = 10.7 MHz SSC
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* Overshoot: 10.7 MHz * 20 % = 2.2 MHz
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* --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
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*/
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const struct dpll_params dpll_mpu_shc_opp100 = {
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99, MPUPLL_N, 1, -1, -1, -1, -1};
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void am33xx_spl_board_init(void)
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{
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int sil_rev;
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int mpu_vdd;
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puts(BOARD_ID_STR);
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/*
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* Set CORE Frequency to OPP100
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* Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
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*/
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do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
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sil_rev = readl(&cdev->deviceid) >> 28;
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if (sil_rev < 2) {
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puts("We do not support Silicon Revisions below 2.0!\n");
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return;
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}
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dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
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if (i2c_probe(TPS65217_CHIP_PM))
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return;
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/*
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* Retrieve the CPU max frequency by reading the efuse
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* SHC-Default: 600 MHz
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*/
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switch (dpll_mpu_opp100.m) {
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case MPUPLL_M_1000:
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
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break;
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case MPUPLL_M_800:
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
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break;
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case MPUPLL_M_720:
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
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break;
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case MPUPLL_M_600:
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
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break;
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case MPUPLL_M_300:
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
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break;
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default:
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puts("Cannot determine the frequency, failing!\n");
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return;
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}
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if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
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puts("tps65217_voltage_update failure\n");
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return;
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}
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/* Set MPU Frequency to what we detected */
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printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
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printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
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dpll_mpu_shc_opp100.m);
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do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
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/* Enable Spread Spectrum for this freq to be clean on EMI side */
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set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
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/*
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* Using the default voltages for the PMIC (TPS65217D)
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* LS1 = 1.8V (VDD_1V8)
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* LS2 = 3.3V (VDD_3V3A)
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* LDO1 = 1.8V (VIO and VRTC)
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* LDO2 = 3.3V (VDD_3V3AUX)
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*/
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shc_board_early_init();
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}
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void set_uart_mux_conf(void)
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{
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enable_uart0_pin_mux();
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}
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void set_mux_conf_regs(void)
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{
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enable_shc_board_pin_mux();
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}
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const struct ctrl_ioregs ioregs_evmsk = {
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.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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};
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static const struct ddr_data ddr3_shc_data = {
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.datardsratio0 = MT41K256M16HA125E_RD_DQS,
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.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
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.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
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.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
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};
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static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
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.cmd0csratio = MT41K256M16HA125E_RATIO,
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.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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.cmd1csratio = MT41K256M16HA125E_RATIO,
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.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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.cmd2csratio = MT41K256M16HA125E_RATIO,
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.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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};
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static struct emif_regs ddr3_shc_emif_reg_data = {
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.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
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.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
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.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
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.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
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.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
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.zq_config = MT41K256M16HA125E_ZQ_CFG,
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.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
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PHY_EN_DYN_PWRDN,
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};
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void sdram_init(void)
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{
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/* Configure the DDR3 RAM */
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config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
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&ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
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}
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#endif
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/*
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* Basic board specific setup. Pinmux has been handled already.
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*/
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int board_init(void)
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{
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#if defined(CONFIG_HW_WATCHDOG)
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hw_watchdog_init();
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#endif
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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if (read_eeprom() < 0)
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puts("EEPROM Content Invalid.\n");
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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gpmc_init();
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#endif
|
|
shc_request_gpio();
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_BOARD_LATE_INIT
|
|
int board_late_init(void)
|
|
{
|
|
check_button_status();
|
|
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
if (shc_eeprom_valid)
|
|
if (is_valid_ethaddr(header.mac_addr))
|
|
eth_env_set_enetaddr("ethaddr", header.mac_addr);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifndef CONFIG_DM_ETH
|
|
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
|
|
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
|
|
static void cpsw_control(int enabled)
|
|
{
|
|
/* VTP can be added here */
|
|
|
|
return;
|
|
}
|
|
|
|
static struct cpsw_slave_data cpsw_slaves[] = {
|
|
{
|
|
.slave_reg_ofs = 0x208,
|
|
.sliver_reg_ofs = 0xd80,
|
|
.phy_addr = 0,
|
|
},
|
|
{
|
|
.slave_reg_ofs = 0x308,
|
|
.sliver_reg_ofs = 0xdc0,
|
|
.phy_addr = 1,
|
|
},
|
|
};
|
|
|
|
static struct cpsw_platform_data cpsw_data = {
|
|
.mdio_base = CPSW_MDIO_BASE,
|
|
.cpsw_base = CPSW_BASE,
|
|
.mdio_div = 0xff,
|
|
.channels = 8,
|
|
.cpdma_reg_ofs = 0x800,
|
|
.slaves = 1,
|
|
.slave_data = cpsw_slaves,
|
|
.ale_reg_ofs = 0xd00,
|
|
.ale_entries = 1024,
|
|
.host_port_reg_ofs = 0x108,
|
|
.hw_stats_reg_ofs = 0x900,
|
|
.bd_ram_ofs = 0x2000,
|
|
.mac_control = (1 << 5),
|
|
.control = cpsw_control,
|
|
.host_port_num = 0,
|
|
.version = CPSW_CTRL_VERSION_2,
|
|
};
|
|
#endif
|
|
|
|
/*
|
|
* This function will:
|
|
* Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
|
|
* in the environment
|
|
* Perform fixups to the PHY present on certain boards. We only need this
|
|
* function in:
|
|
* - SPL with either CPSW or USB ethernet support
|
|
* - Full U-Boot, with either CPSW or USB ethernet
|
|
* Build in only these cases to avoid warnings about unused variables
|
|
* when we build an SPL that has neither option but full U-Boot will.
|
|
*/
|
|
#if ((defined(CONFIG_SPL_ETH_SUPPORT) || \
|
|
defined(CONFIG_SPL_USB_ETHER)) && \
|
|
defined(CONFIG_SPL_BUILD)) || \
|
|
((defined(CONFIG_DRIVER_TI_CPSW) || \
|
|
defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
|
|
!defined(CONFIG_SPL_BUILD))
|
|
int board_eth_init(bd_t *bis)
|
|
{
|
|
int rv, n = 0;
|
|
uint8_t mac_addr[6];
|
|
uint32_t mac_hi, mac_lo;
|
|
|
|
/* try reading mac address from efuse */
|
|
mac_lo = readl(&cdev->macid0l);
|
|
mac_hi = readl(&cdev->macid0h);
|
|
mac_addr[0] = mac_hi & 0xFF;
|
|
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
|
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
|
|
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
|
|
mac_addr[4] = mac_lo & 0xFF;
|
|
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
|
|
|
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
|
|
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
|
|
if (!env_get("ethaddr")) {
|
|
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
|
|
|
|
if (is_valid_ethaddr(mac_addr))
|
|
eth_env_set_enetaddr("ethaddr", mac_addr);
|
|
}
|
|
|
|
writel(MII_MODE_ENABLE, &cdev->miisel);
|
|
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
|
|
cpsw_slaves[1].phy_if = cpsw_slaves[0].phy_if;
|
|
rv = cpsw_register(&cpsw_data);
|
|
if (rv < 0)
|
|
printf("Error %d registering CPSW switch\n", rv);
|
|
else
|
|
n += rv;
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_ETHER) && \
|
|
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
|
|
if (is_valid_ethaddr(mac_addr))
|
|
eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
|
|
|
|
rv = usb_eth_initialize(bis);
|
|
if (rv < 0)
|
|
printf("Error %d registering USB_ETHER\n", rv);
|
|
else
|
|
n += rv;
|
|
#endif
|
|
return n;
|
|
}
|
|
#endif
|
|
|
|
#endif /* CONFIG_DM_ETH */
|
|
|
|
#ifdef CONFIG_SHOW_BOOT_PROGRESS
|
|
static void bosch_check_reset_pin(void)
|
|
{
|
|
if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
|
|
printf("Resetting ...\n");
|
|
writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
|
|
disable_interrupts();
|
|
reset_cpu(0);
|
|
/*NOTREACHED*/
|
|
}
|
|
}
|
|
|
|
static void hang_bosch(const char *cause, int code)
|
|
{
|
|
int lv;
|
|
|
|
gpio_direction_input(RESET_GPIO);
|
|
|
|
/* Enable reset pin interrupt on falling edge */
|
|
writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
|
|
writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
|
|
enable_interrupts();
|
|
|
|
puts(cause);
|
|
for (;;) {
|
|
for (lv = 0; lv < code; lv++) {
|
|
bosch_check_reset_pin();
|
|
leds_set_failure(1);
|
|
__udelay(150 * 1000);
|
|
leds_set_failure(0);
|
|
__udelay(150 * 1000);
|
|
}
|
|
#if defined(BLINK_CODE)
|
|
__udelay(300 * 1000);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
void show_boot_progress(int val)
|
|
{
|
|
switch (val) {
|
|
case BOOTSTAGE_ID_NEED_RESET:
|
|
hang_bosch("need reset", 4);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void arch_preboot_os(void)
|
|
{
|
|
leds_set_finish();
|
|
}
|
|
|
|
#if defined(CONFIG_MMC)
|
|
int board_mmc_init(bd_t *bis)
|
|
{
|
|
int ret;
|
|
|
|
/* Bosch: Do not enable 52MHz for eMMC device to avoid EMI */
|
|
ret = omap_mmc_init(0, MMC_MODE_HS_52MHz, 26000000, -1, -1);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = omap_mmc_init(1, MMC_MODE_HS_52MHz, 26000000, -1, -1);
|
|
return ret;
|
|
}
|
|
#endif
|