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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
Replaced hardcoded PL011 clock frequency with config variable. Fixed wrong CONFIG_CMD_DFL doc. * Patch by Thomas Viehweger, 09 Jun 2004: make it possible to remove chpart when there is only one partition
172 lines
3.7 KiB
C
172 lines
3.7 KiB
C
/*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */
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/* Should be fairly simple to make it work with the PL010 as well */
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#include <common.h>
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#ifdef CFG_PL010_SERIAL
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#include "serial_pl011.h"
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#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
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#define IO_READ(addr) (*(volatile unsigned int *)(addr))
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/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
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#define CONSOLE_PORT CONFIG_CONS_INDEX
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#define baudRate CONFIG_BAUDRATE
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static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
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#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
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static void pl010_putc (int portnum, char c);
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static int pl010_getc (int portnum);
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static int pl010_tstc (int portnum);
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int serial_init (void)
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{
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unsigned int divisor;
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/*
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** First, disable everything.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
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/*
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** Set baud rate
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**
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*/
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switch (baudRate) {
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case 9600:
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divisor = UART_PL010_BAUD_9600;
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break;
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case 19200:
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divisor = UART_PL010_BAUD_9600;
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break;
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case 38400:
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divisor = UART_PL010_BAUD_38400;
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break;
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case 57600:
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divisor = UART_PL010_BAUD_57600;
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break;
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case 115200:
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divisor = UART_PL010_BAUD_115200;
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break;
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default:
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divisor = UART_PL010_BAUD_38400;
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}
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
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((divisor & 0xf00) >> 8));
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
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/*
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** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
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(UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
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/*
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** Finally, enable the UART
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
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return (0);
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}
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void serial_putc (const char c)
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{
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if (c == '\n')
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pl010_putc (CONSOLE_PORT, '\r');
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pl010_putc (CONSOLE_PORT, c);
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}
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void serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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int serial_getc (void)
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{
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return pl010_getc (CONSOLE_PORT);
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}
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int serial_tstc (void)
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{
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return pl010_tstc (CONSOLE_PORT);
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}
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void serial_setbrg (void)
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{
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}
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static void pl010_putc (int portnum, char c)
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{
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/* Wait until there is space in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF);
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/* Send the character */
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IO_WRITE (port[portnum] + UART_PL01x_DR, c);
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}
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static int pl010_getc (int portnum)
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{
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unsigned int data;
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/* Wait until there is data in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE);
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data = IO_READ (port[portnum] + UART_PL01x_DR);
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/* Check for an error flag */
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if (data & 0xFFFFFF00) {
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/* Clear the error */
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IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
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return -1;
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}
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return (int) data;
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}
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static int pl010_tstc (int portnum)
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{
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return !(IO_READ (port[portnum] + UART_PL01x_FR) &
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UART_PL01x_FR_RXFE);
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}
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#endif
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