mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
2535d60277
add delay to get I2C working with "imm" command and s3c24x0_i2c.c
* Patch by Richard Woodruff, 17 July 03:
- Fixed bug in OMAP1510 baud rate divisor settings.
* Patch by Nye Liu, 16 July 2003:
MPC860FADS fixes:
- add MPC86xADS support (uses MPC86xADS.h)
- add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
o PLPRCR changes
o BRG changes (EXTAL/XTAL restricted to 10MHz)
o don't trust gclk() software measurement by default, depend on
CONFIG_8xx_GCLK_FREQ
- add DRAM SIMM not installed detection
- use more "correct" SDRAM initialization sequence
- allow different SDRAM sizes (8xxADS has 8M)
- default DER is 0
- remove unused MAMR defines from FADS860T.h (all done in fads.c)
- rename MAMR/MBMR defines to be more consistent. Should eventually
be merged into MxMR to better reflect the PowerQUICC datasheet.
* Patch by Yuli Barcohen, 16 Jul 2003:
support new Motorola PQ2FADS-ZU evaluation board which replaced
MPC8260ADS and MPC8266ADS
112 lines
2.4 KiB
C
112 lines
2.4 KiB
C
/*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#ifdef CFG_NS16550_SERIAL
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#include <ns16550.h>
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#ifdef CFG_NS87308
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#include <ns87308.h>
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#endif
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#if CONFIG_CONS_INDEX == 1
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static NS16550_t console = (NS16550_t) CFG_NS16550_COM1;
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#elif CONFIG_CONS_INDEX == 2
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static NS16550_t console = (NS16550_t) CFG_NS16550_COM2;
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#elif CONFIG_CONS_INDEX == 3
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static NS16550_t console = (NS16550_t) CFG_NS16550_COM3;
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#elif CONFIG_CONS_INDEX == 4
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static NS16550_t console = (NS16550_t) CFG_NS16550_COM4;
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#else
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#error no valid console defined
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#endif
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static int calc_divisor (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_OMAP1510
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/* If can't cleanly clock 115200 set div to 1 */
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if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
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console->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
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return (1); /* return 1 for base divisor */
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}
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console->osc_12m_sel = 0; /* clear if previsouly set */
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#endif
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return (CFG_NS16550_CLK / 16 / gd->baudrate);
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}
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int serial_init (void)
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{
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int clock_divisor = calc_divisor();
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#ifdef CFG_NS87308
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initialise_ns87308();
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#endif
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NS16550_init(console, clock_divisor);
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return (0);
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}
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void
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serial_putc(const char c)
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{
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if (c == '\n')
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NS16550_putc(console, '\r');
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NS16550_putc(console, c);
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}
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void
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serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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int
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serial_getc(void)
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{
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return NS16550_getc(console);
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}
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int
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serial_tstc(void)
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{
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return NS16550_tstc(console);
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}
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void
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serial_setbrg (void)
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{
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int clock_divisor;
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clock_divisor = calc_divisor();
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NS16550_reinit(console, clock_divisor);
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}
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#endif
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