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https://github.com/brain-hackers/u-boot-brain
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2514c2d0e6
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver model for all the drivers, even in SPL - all security feature are deactivated (ETZC and TZC) - reused STM32 MCU drivers when it is possible Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
28 lines
643 B
C
28 lines
643 B
C
/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
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*/
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#ifndef _MACH_STM32_H_
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#define _MACH_STM32_H_
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/*
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* Peripheral memory map
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* only address used before device tree parsing
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*/
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#define STM32_RCC_BASE 0x50000000
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#define STM32_PWR_BASE 0x50001000
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#define STM32_DBGMCU_BASE 0x50081000
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#define STM32_TZC_BASE 0x5C006000
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#define STM32_ETZPC_BASE 0x5C007000
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#define STM32_TAMP_BASE 0x5C00A000
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#define STM32_SYSRAM_BASE 0x2FFC0000
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#define STM32_SYSRAM_SIZE SZ_256K
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#define STM32_DDR_BASE 0xC0000000
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#define STM32_DDR_SIZE SZ_1G
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#endif /* _MACH_STM32_H_ */
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