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https://github.com/brain-hackers/u-boot-brain
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![Kazuaki Ichinohe](/assets/img/avatar_default.png)
This patch adds a SATA harddisk driver for the canyonlands. This patch is kernel driver's porting. This patch corresponded to not cmd_scsi but cmd_sata. This patch divided an unused member with ifndef __U_BOOT__ in the structure. [environment variable, boot script] setenv bootargs root=/dev/sda7 rw setenv bootargs ${bootargs} console=ttyS0,115200 ext2load sata 0:2 0x400000 /canyonlands/uImage ext2load sata 0:2 0x800000 /canyonlands/canyonlands.dtb fdt addr 0x800000 0x4000 bootm 0x400000 - 0x800000 If you drive SATA-2 disk on Canyonlands, you must change parts from PI2PCIE212 to PI2PCIE2212 on U25. We confirmed to boot by using following disks: 1.Vendor: Fujitsu Type: MHW2040BS 2.Vendor: Fujitsu Type: MHW2060BK 3.Vendor: HAGIWARA SYS-COM:HFD25S-032GT 4.Vendor: WesternDigital Type: WD3200BJKT (CONFIG_LBA48 required) 5.Vendor: WesternDigital Type: WD3200BEVT (CONFIG_LBA48 required) 6.Vendor: Hitachi Type: HTS543232L9A300 (CONFIG_LBA48 required) 7.Vendor: Seagate Type: ST31000333AS (CONFIG_LBA48 required) 8.Vendor: Transcend Type: TS32GSSD25S-M 9.Vendor: MTRON Type: MSD-SATA1525-016 Signed-off-by: Kazuaki Ichinohe <kazuichi at fsi.co.jp>
478 lines
10 KiB
C
478 lines
10 KiB
C
/*
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* sata_dwc.h
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*
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* Synopsys DesignWare Cores (DWC) SATA host driver
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*
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* Author: Mark Miesfeld <mmiesfeld@amcc.com>
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*
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* Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de>
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* Copyright 2008 DENX Software Engineering
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*
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* Based on versions provided by AMCC and Synopsys which are:
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* Copyright 2006 Applied Micro Circuits Corporation
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* COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
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*
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* This program is free software; you can redistribute
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* it and/or modify it under the terms of the GNU
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* General Public License as published by the
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* Free Software Foundation; either version 2 of the License,
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* or (at your option) any later version.
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*
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*/
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/*
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* SATA support based on the chip canyonlands.
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*
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* 04-17-2009
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* The local version of this driver for the canyonlands board
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* does not use interrupts but polls the chip instead.
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*/
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#ifndef _SATA_DWC_H_
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#define _SATA_DWC_H_
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#define __U_BOOT__
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#define HZ 100
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#define READ 0
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#define WRITE 1
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enum {
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ATA_READID_POSTRESET = (1 << 0),
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ATA_DNXFER_PIO = 0,
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ATA_DNXFER_DMA = 1,
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ATA_DNXFER_40C = 2,
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ATA_DNXFER_FORCE_PIO = 3,
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ATA_DNXFER_FORCE_PIO0 = 4,
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ATA_DNXFER_QUIET = (1 << 31),
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};
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enum hsm_task_states {
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HSM_ST_IDLE,
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HSM_ST_FIRST,
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HSM_ST,
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HSM_ST_LAST,
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HSM_ST_ERR,
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};
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#define ATA_SHORT_PAUSE ((HZ >> 6) + 1)
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struct ata_queued_cmd {
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struct ata_port *ap;
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struct ata_device *dev;
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struct ata_taskfile tf;
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u8 cdb[ATAPI_CDB_LEN];
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unsigned long flags;
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unsigned int tag;
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unsigned int n_elem;
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int dma_dir;
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unsigned int sect_size;
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unsigned int nbytes;
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unsigned int extrabytes;
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unsigned int curbytes;
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unsigned int err_mask;
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struct ata_taskfile result_tf;
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void *private_data;
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#ifndef __U_BOOT__
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void *lldd_task;
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#endif
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unsigned char *pdata;
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};
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typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
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#define ATA_TAG_POISON 0xfafbfcfdU
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enum {
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LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
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LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4,
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ATA_MAX_PORTS = 8,
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ATA_DEF_QUEUE = 1,
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ATA_MAX_QUEUE = 32,
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ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
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ATA_MAX_BUS = 2,
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ATA_DEF_BUSY_WAIT = 10000,
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ATAPI_MAX_DRAIN = 16 << 10,
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ATA_SHT_EMULATED = 1,
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ATA_SHT_CMD_PER_LUN = 1,
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ATA_SHT_THIS_ID = -1,
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ATA_SHT_USE_CLUSTERING = 1,
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ATA_DFLAG_LBA = (1 << 0),
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ATA_DFLAG_LBA48 = (1 << 1),
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ATA_DFLAG_CDB_INTR = (1 << 2),
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ATA_DFLAG_NCQ = (1 << 3),
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ATA_DFLAG_FLUSH_EXT = (1 << 4),
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ATA_DFLAG_ACPI_PENDING = (1 << 5),
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ATA_DFLAG_ACPI_FAILED = (1 << 6),
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ATA_DFLAG_AN = (1 << 7),
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ATA_DFLAG_HIPM = (1 << 8),
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ATA_DFLAG_DIPM = (1 << 9),
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ATA_DFLAG_DMADIR = (1 << 10),
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ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
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ATA_DFLAG_PIO = (1 << 12),
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ATA_DFLAG_NCQ_OFF = (1 << 13),
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ATA_DFLAG_SPUNDOWN = (1 << 14),
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ATA_DFLAG_SLEEPING = (1 << 15),
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ATA_DFLAG_DUBIOUS_XFER = (1 << 16),
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ATA_DFLAG_INIT_MASK = (1 << 24) - 1,
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ATA_DFLAG_DETACH = (1 << 24),
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ATA_DFLAG_DETACHED = (1 << 25),
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ATA_LFLAG_HRST_TO_RESUME = (1 << 0),
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ATA_LFLAG_SKIP_D2H_BSY = (1 << 1),
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ATA_LFLAG_NO_SRST = (1 << 2),
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ATA_LFLAG_ASSUME_ATA = (1 << 3),
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ATA_LFLAG_ASSUME_SEMB = (1 << 4),
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ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
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ATA_LFLAG_NO_RETRY = (1 << 5),
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ATA_LFLAG_DISABLED = (1 << 6),
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ATA_FLAG_SLAVE_POSS = (1 << 0),
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ATA_FLAG_SATA = (1 << 1),
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ATA_FLAG_NO_LEGACY = (1 << 2),
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ATA_FLAG_MMIO = (1 << 3),
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ATA_FLAG_SRST = (1 << 4),
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ATA_FLAG_SATA_RESET = (1 << 5),
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ATA_FLAG_NO_ATAPI = (1 << 6),
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ATA_FLAG_PIO_DMA = (1 << 7),
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ATA_FLAG_PIO_LBA48 = (1 << 8),
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ATA_FLAG_PIO_POLLING = (1 << 9),
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ATA_FLAG_NCQ = (1 << 10),
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ATA_FLAG_DEBUGMSG = (1 << 13),
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ATA_FLAG_IGN_SIMPLEX = (1 << 15),
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ATA_FLAG_NO_IORDY = (1 << 16),
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ATA_FLAG_ACPI_SATA = (1 << 17),
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ATA_FLAG_AN = (1 << 18),
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ATA_FLAG_PMP = (1 << 19),
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ATA_FLAG_IPM = (1 << 20),
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ATA_FLAG_DISABLED = (1 << 23),
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ATA_PFLAG_EH_PENDING = (1 << 0),
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ATA_PFLAG_EH_IN_PROGRESS = (1 << 1),
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ATA_PFLAG_FROZEN = (1 << 2),
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ATA_PFLAG_RECOVERED = (1 << 3),
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ATA_PFLAG_LOADING = (1 << 4),
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ATA_PFLAG_UNLOADING = (1 << 5),
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ATA_PFLAG_SCSI_HOTPLUG = (1 << 6),
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ATA_PFLAG_INITIALIZING = (1 << 7),
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ATA_PFLAG_RESETTING = (1 << 8),
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ATA_PFLAG_SUSPENDED = (1 << 17),
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ATA_PFLAG_PM_PENDING = (1 << 18),
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ATA_QCFLAG_ACTIVE = (1 << 0),
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ATA_QCFLAG_DMAMAP = (1 << 1),
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ATA_QCFLAG_IO = (1 << 3),
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ATA_QCFLAG_RESULT_TF = (1 << 4),
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ATA_QCFLAG_CLEAR_EXCL = (1 << 5),
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ATA_QCFLAG_QUIET = (1 << 6),
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ATA_QCFLAG_FAILED = (1 << 16),
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ATA_QCFLAG_SENSE_VALID = (1 << 17),
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ATA_QCFLAG_EH_SCHEDULED = (1 << 18),
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ATA_HOST_SIMPLEX = (1 << 0),
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ATA_HOST_STARTED = (1 << 1),
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ATA_TMOUT_BOOT = 30 * 100,
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ATA_TMOUT_BOOT_QUICK = 7 * 100,
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ATA_TMOUT_INTERNAL = 30 * 100,
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ATA_TMOUT_INTERNAL_QUICK = 5 * 100,
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/* FIXME: GoVault needs 2s but we can't afford that without
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* parallel probing. 800ms is enough for iVDR disk
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* HHD424020F7SV00. Increase to 2secs when parallel probing
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* is in place.
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*/
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ATA_TMOUT_FF_WAIT = 4 * 100 / 5,
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BUS_UNKNOWN = 0,
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BUS_DMA = 1,
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BUS_IDLE = 2,
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BUS_NOINTR = 3,
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BUS_NODATA = 4,
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BUS_TIMER = 5,
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BUS_PIO = 6,
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BUS_EDD = 7,
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BUS_IDENTIFY = 8,
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BUS_PACKET = 9,
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PORT_UNKNOWN = 0,
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PORT_ENABLED = 1,
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PORT_DISABLED = 2,
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/* encoding various smaller bitmaps into a single
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* unsigned long bitmap
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*/
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ATA_NR_PIO_MODES = 7,
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ATA_NR_MWDMA_MODES = 5,
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ATA_NR_UDMA_MODES = 8,
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ATA_SHIFT_PIO = 0,
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ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES,
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ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES,
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ATA_DMA_PAD_SZ = 4,
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ATA_ERING_SIZE = 32,
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ATA_DEFER_LINK = 1,
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ATA_DEFER_PORT = 2,
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ATA_EH_DESC_LEN = 80,
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ATA_EH_REVALIDATE = (1 << 0),
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ATA_EH_SOFTRESET = (1 << 1),
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ATA_EH_HARDRESET = (1 << 2),
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ATA_EH_ENABLE_LINK = (1 << 3),
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ATA_EH_LPM = (1 << 4),
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ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
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ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE,
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ATA_EHI_HOTPLUGGED = (1 << 0),
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ATA_EHI_RESUME_LINK = (1 << 1),
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ATA_EHI_NO_AUTOPSY = (1 << 2),
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ATA_EHI_QUIET = (1 << 3),
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ATA_EHI_DID_SOFTRESET = (1 << 16),
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ATA_EHI_DID_HARDRESET = (1 << 17),
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ATA_EHI_PRINTINFO = (1 << 18),
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ATA_EHI_SETMODE = (1 << 19),
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ATA_EHI_POST_SETMODE = (1 << 20),
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ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
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ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
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ATA_EH_MAX_TRIES = 5,
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ATA_PROBE_MAX_TRIES = 3,
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ATA_EH_DEV_TRIES = 3,
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ATA_EH_PMP_TRIES = 5,
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ATA_EH_PMP_LINK_TRIES = 3,
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SATA_PMP_SCR_TIMEOUT = 250,
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/* Horkage types. May be set by libata or controller on drives
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(some horkage may be drive/controller pair dependant */
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ATA_HORKAGE_DIAGNOSTIC = (1 << 0),
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ATA_HORKAGE_NODMA = (1 << 1),
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ATA_HORKAGE_NONCQ = (1 << 2),
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ATA_HORKAGE_MAX_SEC_128 = (1 << 3),
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ATA_HORKAGE_BROKEN_HPA = (1 << 4),
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ATA_HORKAGE_SKIP_PM = (1 << 5),
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ATA_HORKAGE_HPA_SIZE = (1 << 6),
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ATA_HORKAGE_IPM = (1 << 7),
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ATA_HORKAGE_IVB = (1 << 8),
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ATA_HORKAGE_STUCK_ERR = (1 << 9),
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ATA_DMA_MASK_ATA = (1 << 0),
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ATA_DMA_MASK_ATAPI = (1 << 1),
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ATA_DMA_MASK_CFA = (1 << 2),
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ATAPI_READ = 0,
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ATAPI_WRITE = 1,
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ATAPI_READ_CD = 2,
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ATAPI_PASS_THRU = 3,
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ATAPI_MISC = 4,
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};
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enum ata_completion_errors {
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AC_ERR_DEV = (1 << 0),
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AC_ERR_HSM = (1 << 1),
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AC_ERR_TIMEOUT = (1 << 2),
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AC_ERR_MEDIA = (1 << 3),
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AC_ERR_ATA_BUS = (1 << 4),
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AC_ERR_HOST_BUS = (1 << 5),
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AC_ERR_SYSTEM = (1 << 6),
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AC_ERR_INVALID = (1 << 7),
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AC_ERR_OTHER = (1 << 8),
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AC_ERR_NODEV_HINT = (1 << 9),
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AC_ERR_NCQ = (1 << 10),
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};
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enum ata_xfer_mask {
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ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO,
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ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA,
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ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA,
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};
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struct ata_port_info {
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#ifndef __U_BOOT__
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struct scsi_host_template *sht;
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#endif
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unsigned long flags;
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unsigned long link_flags;
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unsigned long pio_mask;
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unsigned long mwdma_mask;
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unsigned long udma_mask;
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#ifndef __U_BOOT__
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const struct ata_port_operations *port_ops;
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void *private_data;
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#endif
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};
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struct ata_ioports {
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void __iomem *cmd_addr;
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void __iomem *data_addr;
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void __iomem *error_addr;
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void __iomem *feature_addr;
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void __iomem *nsect_addr;
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void __iomem *lbal_addr;
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void __iomem *lbam_addr;
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void __iomem *lbah_addr;
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void __iomem *device_addr;
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void __iomem *status_addr;
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void __iomem *command_addr;
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void __iomem *altstatus_addr;
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void __iomem *ctl_addr;
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#ifndef __U_BOOT__
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void __iomem *bmdma_addr;
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#endif
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void __iomem *scr_addr;
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};
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struct ata_host {
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#ifndef __U_BOOT__
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void __iomem * const *iomap;
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void *private_data;
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const struct ata_port_operations *ops;
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unsigned long flags;
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struct ata_port *simplex_claimed;
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#endif
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unsigned int n_ports;
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struct ata_port *ports[0];
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};
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#ifndef __U_BOOT__
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struct ata_port_stats {
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unsigned long unhandled_irq;
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unsigned long idle_irq;
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unsigned long rw_reqbuf;
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};
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#endif
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struct ata_device {
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struct ata_link *link;
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unsigned int devno;
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unsigned long flags;
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unsigned int horkage;
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#ifndef __U_BOOT__
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struct scsi_device *sdev;
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#ifdef CONFIG_ATA_ACPI
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acpi_handle acpi_handle;
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union acpi_object *gtf_cache;
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#endif
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#endif
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u64 n_sectors;
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unsigned int class;
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union {
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u16 id[ATA_ID_WORDS];
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u32 gscr[SATA_PMP_GSCR_DWORDS];
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};
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#ifndef __U_BOOT__
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u8 pio_mode;
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u8 dma_mode;
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u8 xfer_mode;
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unsigned int xfer_shift;
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#endif
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unsigned int multi_count;
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unsigned int max_sectors;
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unsigned int cdb_len;
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#ifndef __U_BOOT__
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unsigned long pio_mask;
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unsigned long mwdma_mask;
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#endif
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unsigned long udma_mask;
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u16 cylinders;
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u16 heads;
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u16 sectors;
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#ifndef __U_BOOT__
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int spdn_cnt;
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#endif
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};
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enum dma_data_direction {
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DMA_BIDIRECTIONAL = 0,
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DMA_TO_DEVICE = 1,
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DMA_FROM_DEVICE = 2,
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DMA_NONE = 3,
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};
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struct ata_link {
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struct ata_port *ap;
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int pmp;
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unsigned int active_tag;
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u32 sactive;
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unsigned int flags;
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unsigned int hw_sata_spd_limit;
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#ifndef __U_BOOT__
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unsigned int sata_spd_limit;
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unsigned int sata_spd;
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struct ata_device device[2];
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#endif
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};
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struct ata_port {
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unsigned long flags;
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unsigned int pflags;
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unsigned int print_id;
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unsigned int port_no;
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struct ata_ioports ioaddr;
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u8 ctl;
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u8 last_ctl;
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unsigned int pio_mask;
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unsigned int mwdma_mask;
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unsigned int udma_mask;
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unsigned int cbl;
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struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
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unsigned long qc_allocated;
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unsigned int qc_active;
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int nr_active_links;
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struct ata_link link;
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#ifndef __U_BOOT__
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int nr_pmp_links;
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struct ata_link *pmp_link;
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#endif
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struct ata_link *excl_link;
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int nr_pmp_links;
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#ifndef __U_BOOT__
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struct ata_port_stats stats;
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struct device *dev;
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u32 msg_enable;
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#endif
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struct ata_host *host;
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void *port_task_data;
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unsigned int hsm_task_state;
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void *private_data;
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unsigned char *pdata;
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};
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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#endif
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