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9606b3c81b
When doing the AT91CAP9/AT91SAM9 port, a number of header files were copied from the Linux kernel sources. This patch explicitly specifies this origin for all the copied headers, and for those missing copyright information, adds it. Additionaly, the header file 'at91sam926x_mc.h' has been superceeded in the latest kernel sources by 'at91sam9_smc.h'. The copyright information has been confirmed by the AT91 Linux kernel maintainer, Andrew Victor <avictor.za@gmail.com>. Signed-off-by: Stelian Pop <stelian@popies.net>
50 lines
2.1 KiB
C
50 lines
2.1 KiB
C
/*
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* [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
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*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* Parallel I/O Controller (PIO) - System peripherals registers.
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* Based on AT91RM9200 datasheet revision E.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_PIO_H
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#define AT91_PIO_H
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#define PIO_PER 0x00 /* Enable Register */
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#define PIO_PDR 0x04 /* Disable Register */
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#define PIO_PSR 0x08 /* Status Register */
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#define PIO_OER 0x10 /* Output Enable Register */
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#define PIO_ODR 0x14 /* Output Disable Register */
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#define PIO_OSR 0x18 /* Output Status Register */
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#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
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#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
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#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
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#define PIO_SODR 0x30 /* Set Output Data Register */
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#define PIO_CODR 0x34 /* Clear Output Data Register */
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#define PIO_ODSR 0x38 /* Output Data Status Register */
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#define PIO_PDSR 0x3c /* Pin Data Status Register */
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#define PIO_IER 0x40 /* Interrupt Enable Register */
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#define PIO_IDR 0x44 /* Interrupt Disable Register */
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#define PIO_IMR 0x48 /* Interrupt Mask Register */
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#define PIO_ISR 0x4c /* Interrupt Status Register */
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#define PIO_MDER 0x50 /* Multi-driver Enable Register */
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#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
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#define PIO_MDSR 0x58 /* Multi-driver Status Register */
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#define PIO_PUDR 0x60 /* Pull-up Disable Register */
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#define PIO_PUER 0x64 /* Pull-up Enable Register */
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#define PIO_PUSR 0x68 /* Pull-up Status Register */
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#define PIO_ASR 0x70 /* Peripheral A Select Register */
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#define PIO_BSR 0x74 /* Peripheral B Select Register */
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#define PIO_ABSR 0x78 /* AB Status Register */
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#define PIO_OWER 0xa0 /* Output Write Enable Register */
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#define PIO_OWDR 0xa4 /* Output Write Disable Register */
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#define PIO_OWSR 0xa8 /* Output Write Status Register */
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#endif
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