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https://github.com/brain-hackers/u-boot-brain
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36c1ca4d46
When CONFIG_SECURE_BOOT is enabled, the signed images like kernel and dtb can be authenticated using iMX6 CAAM. The added command hab_auth_img can be used for HAB authentication of images. The command takes the image DDR location, IVT (Image Vector Table) offset inside image as parameters. Detailed info about signing images can be found in Freescale AppNote AN4581. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
331 lines
9.3 KiB
C
331 lines
9.3 KiB
C
/*
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* Copyright (C) 2010-2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/arch/hab.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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/* -------- start of HAB API updates ------------*/
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#define hab_rvt_report_event_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
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)
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#define hab_rvt_report_status_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
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)
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#define hab_rvt_authenticate_image_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
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)
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#define hab_rvt_entry_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
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)
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#define hab_rvt_exit_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
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((hab_rvt_exit_t *)HAB_RVT_EXIT) \
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)
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#define IVT_SIZE 0x20
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#define ALIGN_SIZE 0x1000
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#define CSF_PAD_SIZE 0x2000
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#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
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#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
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#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
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/*
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* +------------+ 0x0 (DDR_UIMAGE_START) -
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* | Header | |
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* +------------+ 0x40 |
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* | | |
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* | | |
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* | | |
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* | | |
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* | Image Data | |
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* . | |
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* . | > Stuff to be authenticated ----+
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* . | | |
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* | | | |
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* | | | |
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* +------------+ | |
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* | | | |
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* | Fill Data | | |
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* | | | |
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* +------------+ Align to ALIGN_SIZE | |
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* | IVT | | |
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* +------------+ + IVT_SIZE - |
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* | | |
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* | CSF DATA | <---------------------------------------------------------+
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* | |
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* +------------+
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* | |
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* | Fill Data |
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* | |
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* +------------+ + CSF_PAD_SIZE
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*/
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bool is_hab_enabled(void)
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct fuse_bank *bank = &ocotp->bank[0];
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struct fuse_bank0_regs *fuse =
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(struct fuse_bank0_regs *)bank->fuse_regs;
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uint32_t reg = readl(&fuse->cfg5);
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return (reg & 0x2) == 0x2;
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}
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void display_event(uint8_t *event_data, size_t bytes)
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{
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uint32_t i;
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if (!(event_data && bytes > 0))
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return;
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for (i = 0; i < bytes; i++) {
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if (i == 0)
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printf("\t0x%02x", event_data[i]);
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else if ((i % 8) == 0)
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printf("\n\t0x%02x", event_data[i]);
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else
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printf(" 0x%02x", event_data[i]);
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}
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}
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int get_hab_status(void)
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{
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uint32_t index = 0; /* Loop index */
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uint8_t event_data[128]; /* Event data buffer */
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size_t bytes = sizeof(event_data); /* Event size in bytes */
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enum hab_config config = 0;
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enum hab_state state = 0;
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hab_rvt_report_event_t *hab_rvt_report_event;
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hab_rvt_report_status_t *hab_rvt_report_status;
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hab_rvt_report_event = hab_rvt_report_event_p;
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hab_rvt_report_status = hab_rvt_report_status_p;
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if (is_hab_enabled())
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puts("\nSecure boot enabled\n");
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else
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puts("\nSecure boot disabled\n");
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/* Check HAB status */
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if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
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printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
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config, state);
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/* Display HAB Error events */
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while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
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&bytes) == HAB_SUCCESS) {
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puts("\n");
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printf("--------- HAB Event %d -----------------\n",
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index + 1);
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puts("event data:\n");
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display_event(event_data, bytes);
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puts("\n");
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bytes = sizeof(event_data);
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index++;
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}
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}
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/* Display message if no HAB events are found */
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else {
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printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
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config, state);
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puts("No HAB Events Found!\n\n");
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}
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return 0;
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}
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uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
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{
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uint32_t load_addr = 0;
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size_t bytes;
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ptrdiff_t ivt_offset = 0;
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int result = 0;
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ulong start;
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hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
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hab_rvt_entry_t *hab_rvt_entry;
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hab_rvt_exit_t *hab_rvt_exit;
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hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
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hab_rvt_entry = hab_rvt_entry_p;
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hab_rvt_exit = hab_rvt_exit_p;
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if (is_hab_enabled()) {
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printf("\nAuthenticate image from DDR location 0x%x...\n",
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ddr_start);
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hab_caam_clock_enable(1);
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if (hab_rvt_entry() == HAB_SUCCESS) {
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/* If not already aligned, Align to ALIGN_SIZE */
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ivt_offset = (image_size + ALIGN_SIZE - 1) &
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~(ALIGN_SIZE - 1);
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start = ddr_start;
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bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
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#ifdef DEBUG
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printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
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ivt_offset, ddr_start + ivt_offset);
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puts("Dumping IVT\n");
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print_buffer(ddr_start + ivt_offset,
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(void *)(ddr_start + ivt_offset),
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4, 0x8, 0);
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puts("Dumping CSF Header\n");
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print_buffer(ddr_start + ivt_offset+IVT_SIZE,
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(void *)(ddr_start + ivt_offset+IVT_SIZE),
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4, 0x10, 0);
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get_hab_status();
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puts("\nCalling authenticate_image in ROM\n");
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printf("\tivt_offset = 0x%x\n", ivt_offset);
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printf("\tstart = 0x%08lx\n", start);
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printf("\tbytes = 0x%x\n", bytes);
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#endif
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/*
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* If the MMU is enabled, we have to notify the ROM
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* code, or it won't flush the caches when needed.
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* This is done, by setting the "pu_irom_mmu_enabled"
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* word to 1. You can find its address by looking in
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* the ROM map. This is critical for
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* authenticate_image(). If MMU is enabled, without
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* setting this bit, authentication will fail and may
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* crash.
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*/
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/* Check MMU enabled */
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if (get_cr() & CR_M) {
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if (is_cpu_type(MXC_CPU_MX6Q) ||
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is_cpu_type(MXC_CPU_MX6D)) {
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/*
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* This won't work on Rev 1.0.0 of
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* i.MX6Q/D, since their ROM doesn't
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* do cache flushes. don't think any
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* exist, so we ignore them.
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*/
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writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
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} else if (is_cpu_type(MXC_CPU_MX6DL) ||
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is_cpu_type(MXC_CPU_MX6SOLO)) {
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writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
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} else if (is_cpu_type(MXC_CPU_MX6SL)) {
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writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
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}
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}
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load_addr = (uint32_t)hab_rvt_authenticate_image(
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HAB_CID_UBOOT,
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ivt_offset, (void **)&start,
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(size_t *)&bytes, NULL);
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if (hab_rvt_exit() != HAB_SUCCESS) {
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puts("hab exit function fail\n");
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load_addr = 0;
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}
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} else {
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puts("hab entry function fail\n");
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}
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hab_caam_clock_enable(0);
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get_hab_status();
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} else {
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puts("hab fuse not enabled\n");
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}
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if ((!is_hab_enabled()) || (load_addr != 0))
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result = 1;
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return result;
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}
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int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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if ((argc != 1)) {
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cmd_usage(cmdtp);
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return 1;
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}
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get_hab_status();
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return 0;
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}
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static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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ulong addr, ivt_offset;
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int rcode = 0;
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if (argc < 3)
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return CMD_RET_USAGE;
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addr = simple_strtoul(argv[1], NULL, 16);
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ivt_offset = simple_strtoul(argv[2], NULL, 16);
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rcode = authenticate_image(addr, ivt_offset);
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return rcode;
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}
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U_BOOT_CMD(
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hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
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"display HAB status",
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""
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);
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U_BOOT_CMD(
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hab_auth_img, 3, 0, do_authenticate_image,
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"authenticate image via HAB",
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"addr ivt_offset\n"
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"addr - image hex address\n"
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"ivt_offset - hex offset of IVT in the image"
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);
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