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![Simon Glass](/assets/img/avatar_default.png)
Move this code into a generic location so that it can be used by other x86 boards which want to boot from coreboot. Also ensure that this is called if booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
42 lines
1002 B
C
42 lines
1002 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Support for booting from coreboot
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*
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* Copyright 2021 Google LLC
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*/
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#include <common.h>
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#include <asm/cb_sysinfo.h>
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#include <asm/e820.h>
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unsigned int cb_install_e820_map(unsigned int max_entries,
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struct e820_entry *entries)
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{
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unsigned int num_entries;
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int i;
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num_entries = min((unsigned int)lib_sysinfo.n_memranges, max_entries);
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if (num_entries < lib_sysinfo.n_memranges) {
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printf("Warning: Limiting e820 map to %d entries\n",
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num_entries);
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}
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for (i = 0; i < num_entries; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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entries[i].addr = memrange->base;
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entries[i].size = memrange->size;
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/*
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* coreboot has some extensions (type 6 & 16) to the E820 types.
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* When we detect this, mark it as E820_RESERVED.
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*/
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if (memrange->type == CB_MEM_VENDOR_RSVD ||
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memrange->type == CB_MEM_TABLE)
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entries[i].type = E820_RESERVED;
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else
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entries[i].type = memrange->type;
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}
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return num_entries;
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}
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