mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
147 lines
4.6 KiB
C
147 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Marek Vasut <marex@denx.de>
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*/
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#include <common.h>
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#include <asm/arch/clock_manager.h>
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#include <qts/pll_config.h>
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#define MAIN_VCO_BASE ( \
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(CONFIG_HPS_MAINPLLGRP_VCO_DENOM << \
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CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET) | \
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(CONFIG_HPS_MAINPLLGRP_VCO_NUMER << \
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CLKMGR_MAINPLLGRP_VCO_NUMER_OFFSET) \
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)
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#define PERI_VCO_BASE ( \
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(CONFIG_HPS_PERPLLGRP_VCO_PSRC << \
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CLKMGR_PERPLLGRP_VCO_PSRC_OFFSET) | \
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(CONFIG_HPS_PERPLLGRP_VCO_DENOM << \
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CLKMGR_PERPLLGRP_VCO_DENOM_OFFSET) | \
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(CONFIG_HPS_PERPLLGRP_VCO_NUMER << \
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CLKMGR_PERPLLGRP_VCO_NUMER_OFFSET) \
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)
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#define SDR_VCO_BASE ( \
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(CONFIG_HPS_SDRPLLGRP_VCO_SSRC << \
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CLKMGR_SDRPLLGRP_VCO_SSRC_OFFSET) | \
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(CONFIG_HPS_SDRPLLGRP_VCO_DENOM << \
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CLKMGR_SDRPLLGRP_VCO_DENOM_OFFSET) | \
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(CONFIG_HPS_SDRPLLGRP_VCO_NUMER << \
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CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET) \
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)
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static const struct cm_config cm_default_cfg = {
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/* main group */
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MAIN_VCO_BASE,
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(CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT <<
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CLKMGR_MAINPLLGRP_MPUCLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT <<
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CLKMGR_MAINPLLGRP_MAINCLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT <<
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CLKMGR_MAINPLLGRP_DBGATCLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT <<
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CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT <<
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CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT <<
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CLKMGR_MAINPLLGRP_CFGS2FUSER0CLK_CNT_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK <<
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CLKMGR_MAINPLLGRP_MAINDIV_L3MPCLK_OFFSET) |
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(CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK <<
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CLKMGR_MAINPLLGRP_MAINDIV_L3SPCLK_OFFSET) |
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(CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK <<
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CLKMGR_MAINPLLGRP_MAINDIV_L4MPCLK_OFFSET) |
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(CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK <<
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CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK <<
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CLKMGR_MAINPLLGRP_DBGDIV_DBGATCLK_OFFSET) |
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(CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK <<
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CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK <<
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CLKMGR_MAINPLLGRP_TRACEDIV_TRACECLK_OFFSET),
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(CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP <<
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CLKMGR_MAINPLLGRP_L4SRC_L4MP_OFFSET) |
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(CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP <<
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CLKMGR_MAINPLLGRP_L4SRC_L4SP_OFFSET),
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/* peripheral group */
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PERI_VCO_BASE,
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(CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT <<
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CLKMGR_PERPLLGRP_EMAC0CLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT <<
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CLKMGR_PERPLLGRP_EMAC1CLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT <<
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CLKMGR_PERPLLGRP_PERQSPICLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT <<
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CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT <<
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CLKMGR_PERPLLGRP_PERBASECLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT <<
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CLKMGR_PERPLLGRP_S2FUSER1CLK_CNT_OFFSET),
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(CONFIG_HPS_PERPLLGRP_DIV_USBCLK <<
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CLKMGR_PERPLLGRP_DIV_USBCLK_OFFSET) |
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(CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK <<
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CLKMGR_PERPLLGRP_DIV_SPIMCLK_OFFSET) |
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(CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK <<
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CLKMGR_PERPLLGRP_DIV_CAN0CLK_OFFSET) |
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(CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK <<
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CLKMGR_PERPLLGRP_DIV_CAN1CLK_OFFSET),
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(CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK <<
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CLKMGR_PERPLLGRP_GPIODIV_GPIODBCLK_OFFSET),
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(CONFIG_HPS_PERPLLGRP_SRC_QSPI <<
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CLKMGR_PERPLLGRP_SRC_QSPI_OFFSET) |
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(CONFIG_HPS_PERPLLGRP_SRC_NAND <<
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CLKMGR_PERPLLGRP_SRC_NAND_OFFSET) |
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(CONFIG_HPS_PERPLLGRP_SRC_SDMMC <<
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CLKMGR_PERPLLGRP_SRC_SDMMC_OFFSET),
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/* sdram pll group */
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SDR_VCO_BASE,
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(CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE <<
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CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_OFFSET) |
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(CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT <<
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CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_OFFSET),
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(CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE <<
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CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET) |
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(CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT <<
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CLKMGR_SDRPLLGRP_DDR2XDQSCLK_CNT_OFFSET),
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(CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE <<
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CLKMGR_SDRPLLGRP_DDRDQCLK_PHASE_OFFSET) |
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(CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT <<
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CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_OFFSET),
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(CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE <<
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CLKMGR_SDRPLLGRP_S2FUSER2CLK_PHASE_OFFSET) |
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(CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT <<
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CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_OFFSET),
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/* altera group */
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CONFIG_HPS_ALTERAGRP_MPUCLK,
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};
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const struct cm_config * const cm_get_default_config(void)
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{
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return &cm_default_cfg;
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}
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const unsigned int cm_get_osc_clk_hz(const int osc)
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{
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if (osc == 1)
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return CONFIG_HPS_CLK_OSC1_HZ;
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else if (osc == 2)
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return CONFIG_HPS_CLK_OSC2_HZ;
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else
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return 0;
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}
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const unsigned int cm_get_f2s_per_ref_clk_hz(void)
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{
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return CONFIG_HPS_CLK_F2S_PER_REF_HZ;
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}
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const unsigned int cm_get_f2s_sdr_ref_clk_hz(void)
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{
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return CONFIG_HPS_CLK_F2S_SDR_REF_HZ;
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}
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