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https://github.com/brain-hackers/u-boot-brain
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22d58506f5
The PI4 GPIO is used on Tamonten to reset carrier board peripherals. Power sequencing hardware on the carrier pulls the reset low before powering up the Tegra, and the CPU is supposed to signal readiness, and therefore bring peripherals out of reset by pulling PI4 high. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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* (C) Copyright 2011-2012
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* Avionic Design GmbH <www.avionic-design.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <ns16550.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/board.h>
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#include <asm/arch/tegra2.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/clk_rst.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/funcmux.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/uart.h>
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#include <asm/arch/mmc.h>
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#ifdef CONFIG_TEGRA2_MMC
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#include <mmc.h>
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#endif
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/*
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* Routine: gpio_config_uart
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* Description: Does nothing on Tamonten - no conflict w/SPI.
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*/
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void gpio_config_uart(void)
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{
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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void gpio_early_init(void)
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{
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gpio_request(GPIO_PI4, NULL);
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gpio_direction_output(GPIO_PI4, 1);
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}
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#endif
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#ifdef CONFIG_TEGRA2_MMC
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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static void pin_mux_mmc(void)
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{
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funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
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/* for CD GPIO PH2 */
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pinmux_tristate_disable(PINGRP_ATD);
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}
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/* this is a weak define that we are overriding */
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int board_mmc_init(bd_t *bd)
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{
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/* Enable muxes, etc. for SDMMC controllers */
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pin_mux_mmc();
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/* init dev 0, SD slot, with 4-bit bus */
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tegra2_mmc_init(0, 4, -1, GPIO_PH2);
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return 0;
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}
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#endif
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