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https://github.com/brain-hackers/u-boot-brain
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78ad457b2d
In the moment our exception entry code needs 34 instructions, so we can't use put it directly into the table entry, which offers "only" 32 instructions there. Right now we just put an unconditional branch there, then use a macro to place the 34 instructions *per entry* after that. That effectivly doubles the size of our exception table, which is quite a waste, given that we use it mostly for debugging purposes. Since the register saving part is actually identical, let's just convert that macro into a function, and "bl" into it directly from the exception slot, of course after having saved at least the original LR. This saves us about 950 bytes of code, which is quite a relief for some tight SPLs, in particular the 64-bit Allwinner ones. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
130 lines
2.4 KiB
ArmAsm
130 lines
2.4 KiB
ArmAsm
/*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <asm/ptrace.h>
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#include <asm/macro.h>
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#include <linux/linkage.h>
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/*
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* Exception vectors.
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*/
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.align 11
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.globl vectors
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vectors:
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.align 7 /* Current EL Synchronous Thread */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_bad_sync
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b exception_exit
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.align 7 /* Current EL IRQ Thread */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_bad_irq
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b exception_exit
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.align 7 /* Current EL FIQ Thread */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_bad_fiq
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b exception_exit
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.align 7 /* Current EL Error Thread */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_bad_error
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b exception_exit
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.align 7 /* Current EL Synchronous Handler */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_sync
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b exception_exit
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.align 7 /* Current EL IRQ Handler */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_irq
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b exception_exit
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.align 7 /* Current EL FIQ Handler */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_fiq
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b exception_exit
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.align 7 /* Current EL Error Handler */
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stp x29, x30, [sp, #-16]!
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bl _exception_entry
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bl do_error
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b exception_exit
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/*
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* Enter Exception.
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* This will save the processor state that is ELR/X0~X30
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* to the stack frame.
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*/
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_exception_entry:
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stp x27, x28, [sp, #-16]!
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stp x25, x26, [sp, #-16]!
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stp x23, x24, [sp, #-16]!
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stp x21, x22, [sp, #-16]!
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stp x19, x20, [sp, #-16]!
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stp x17, x18, [sp, #-16]!
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stp x15, x16, [sp, #-16]!
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stp x13, x14, [sp, #-16]!
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stp x11, x12, [sp, #-16]!
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stp x9, x10, [sp, #-16]!
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stp x7, x8, [sp, #-16]!
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stp x5, x6, [sp, #-16]!
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stp x3, x4, [sp, #-16]!
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stp x1, x2, [sp, #-16]!
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/* Could be running at EL3/EL2/EL1 */
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switch_el x11, 3f, 2f, 1f
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3: mrs x1, esr_el3
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mrs x2, elr_el3
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b 0f
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2: mrs x1, esr_el2
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mrs x2, elr_el2
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b 0f
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1: mrs x1, esr_el1
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mrs x2, elr_el1
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0:
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stp x2, x0, [sp, #-16]!
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mov x0, sp
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ret
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exception_exit:
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ldp x2, x0, [sp],#16
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switch_el x11, 3f, 2f, 1f
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3: msr elr_el3, x2
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b 0f
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2: msr elr_el2, x2
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b 0f
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1: msr elr_el1, x2
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0:
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ldp x1, x2, [sp],#16
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ldp x3, x4, [sp],#16
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ldp x5, x6, [sp],#16
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ldp x7, x8, [sp],#16
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ldp x9, x10, [sp],#16
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ldp x11, x12, [sp],#16
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ldp x13, x14, [sp],#16
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ldp x15, x16, [sp],#16
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ldp x17, x18, [sp],#16
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ldp x19, x20, [sp],#16
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ldp x21, x22, [sp],#16
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ldp x23, x24, [sp],#16
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ldp x25, x26, [sp],#16
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ldp x27, x28, [sp],#16
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ldp x29, x30, [sp],#16
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eret
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