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https://github.com/brain-hackers/u-boot-brain
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22700dc6fb
This patch does the following: - Rename defines and registers to not use kirkwood - Remove unused defines - Use clrsetbits() accessor functions - Coding style cleanup - Clear 25MHZ bit in timer controller register init for Armada XP There is no functional change for kirkwood. At least not intentionally. This will be used by the upcoming Armada XP support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
74 lines
2.4 KiB
C
74 lines
2.4 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Header file for the Marvell's Feroceon CPU core.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_KIRKWOOD_H
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#define _ASM_ARCH_KIRKWOOD_H
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#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)
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/* SOC specific definations */
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#define INTREG_BASE 0xd0000000
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#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x)
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#define KW_OFFSET_REG (INTREG_BASE + 0x20080)
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/* undocumented registers */
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#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
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#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
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#define KW_TWSI_BASE (KW_REGISTER(0x11000))
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#define KW_UART0_BASE (KW_REGISTER(0x12000))
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#define KW_UART1_BASE (KW_REGISTER(0x12100))
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#define KW_MPP_BASE (KW_REGISTER(0x10000))
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#define KW_GPIO0_BASE (KW_REGISTER(0x10100))
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#define KW_GPIO1_BASE (KW_REGISTER(0x10140))
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#define KW_RTC_BASE (KW_REGISTER(0x10300))
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#define KW_NANDF_BASE (KW_REGISTER(0x10418))
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#define KW_SPI_BASE (KW_REGISTER(0x10600))
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#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))
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#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))
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#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))
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#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
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#define KW_USB20_BASE (KW_REGISTER(0x50000))
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#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
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#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
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#define KW_SATA_BASE (KW_REGISTER(0x80000))
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#define KW_SDIO_BASE (KW_REGISTER(0x90000))
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/* Kirkwood Sata controller has two ports */
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#define KW_SATA_PORT0_OFFSET 0x2000
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#define KW_SATA_PORT1_OFFSET 0x4000
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/* Kirkwood GbE controller has two ports */
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#define MAX_MVGBE_DEVS 2
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#define MVGBE0_BASE KW_EGIGA0_BASE
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#define MVGBE1_BASE KW_EGIGA1_BASE
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/* Kirkwood USB Host controller */
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#define MVUSB0_BASE KW_USB20_BASE
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#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0
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#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1
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#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2
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#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3
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/* Kirkwood CPU memory windows */
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#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA
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#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
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#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
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#if defined (CONFIG_KW88F6281)
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#include <asm/arch/kw88f6281.h>
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#elif defined (CONFIG_KW88F6192)
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#include <asm/arch/kw88f6192.h>
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#else
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#error "SOC Name not defined"
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#endif /* CONFIG_KW88F6281 */
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#endif /* CONFIG_FEROCEON_88FR131 */
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#endif /* _ASM_ARCH_KIRKWOOD_H */
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