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https://github.com/brain-hackers/u-boot-brain
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![Simon Glass](/assets/img/avatar_default.png)
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
200 lines
5.0 KiB
C
200 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2020 Toradex
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <micrel.h>
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#include "../common/tdx-cfg-block.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define I2C_PMIC 0
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enum pcb_rev_t {
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PCB_VERSION_1_0,
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PCB_VERSION_1_1
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};
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#if IS_ENABLED(CONFIG_FEC_MXC)
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static int setup_fec(void)
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{
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struct iomuxc_gpr_base_regs *gpr =
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(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
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/* Use 125M anatop REF_CLK1 for ENET1, not from external */
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clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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int tmp;
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switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
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case PHY_ID_KSZ9031:
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/*
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* The PHY adds 1.2ns for the RXC and 0ns for TXC clock by
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* default. The MAC and the layout don't add a skew between
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* clock and data.
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* Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for
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* the TXC path to get the required clock skews.
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*/
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/* control data pad skew - devaddr = 0x02, register = 0x04 */
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ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
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MII_KSZ9031_MOD_DATA_NO_POST_INC,
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0x0070);
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/* rx data pad skew - devaddr = 0x02, register = 0x05 */
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ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
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MII_KSZ9031_MOD_DATA_NO_POST_INC,
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0x7777);
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/* tx data pad skew - devaddr = 0x02, register = 0x06 */
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ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
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MII_KSZ9031_MOD_DATA_NO_POST_INC,
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0x0000);
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/* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
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ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
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MII_KSZ9031_MOD_DATA_NO_POST_INC,
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0x03f4);
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break;
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case PHY_ID_KSZ9131:
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default:
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/* read rxc dll control - devaddr = 0x2, register = 0x4c */
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tmp = ksz9031_phy_extended_read(phydev, 0x02,
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MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
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MII_KSZ9031_MOD_DATA_NO_POST_INC);
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/* disable rxdll bypass (enable 2ns skew delay on RXC) */
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tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
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/* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
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tmp = ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
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MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
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/* read txc dll control - devaddr = 0x02, register = 0x4d */
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tmp = ksz9031_phy_extended_read(phydev, 0x02,
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MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
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MII_KSZ9031_MOD_DATA_NO_POST_INC);
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/* disable txdll bypass (enable 2ns skew delay on TXC) */
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tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
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/* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
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tmp = ksz9031_phy_extended_write(phydev, 0x02,
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MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
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MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
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break;
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}
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#endif
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int board_init(void)
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{
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if (IS_ENABLED(CONFIG_FEC_MXC))
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setup_fec();
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return 0;
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}
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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static enum pcb_rev_t get_pcb_revision(void)
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{
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struct udevice *bus;
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struct udevice *i2c_dev = NULL;
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int ret;
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u8 is_bd71837 = 0;
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ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PMIC, &bus);
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if (!ret)
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ret = dm_i2c_probe(bus, 0x4b, 0, &i2c_dev);
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if (!ret)
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ret = dm_i2c_read(i2c_dev, 0x0, &is_bd71837, 1);
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/* BD71837_REV, High Nibble is major version, fix 1010 */
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is_bd71837 = !ret && ((is_bd71837 & 0xf0) == 0xa0);
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return is_bd71837 ? PCB_VERSION_1_0 : PCB_VERSION_1_1;
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}
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static void select_dt_from_module_version(void)
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{
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char variant[32];
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char *env_variant = env_get("variant");
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int is_wifi = 0;
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if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) {
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/*
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* If we have a valid config block and it says we are a
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* module with Wi-Fi/Bluetooth make sure we use the -wifi
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* device tree.
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*/
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is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) ||
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(tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT);
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}
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switch (get_pcb_revision()) {
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case PCB_VERSION_1_0:
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printf("Detected a V1.0 module\n");
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if (is_wifi)
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strncpy(&variant[0], "wifi", sizeof(variant));
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else
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strncpy(&variant[0], "nonwifi", sizeof(variant));
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break;
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default:
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if (is_wifi)
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strncpy(&variant[0], "wifi-v1.1", sizeof(variant));
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else
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strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant));
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break;
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}
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if (strcmp(variant, env_variant)) {
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printf("Setting variant to %s\n", variant);
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env_set("variant", variant);
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if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
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env_save();
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}
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}
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int board_late_init(void)
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{
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select_dt_from_module_version();
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return 0;
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}
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int board_phys_sdram_size(phys_size_t *size)
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{
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if (!size)
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return -EINVAL;
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*size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return 0;
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}
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#endif
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