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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
c0132f6005
This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
31 lines
967 B
C
31 lines
967 B
C
/*
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* Copyright (C) 2015-2016 Marvell International Ltd.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SATA_H_
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#define _SATA_H_
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/* SATA3 Unit address */
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#define SATA3_VENDOR_ADDRESS 0xA0
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#define SATA3_VENDOR_ADDR_OFSSET 0
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#define SATA3_VENDOR_ADDR_MASK (0xFFFFFFFF << SATA3_VENDOR_ADDR_OFSSET)
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#define SATA3_VENDOR_DATA 0xA4
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#define SATA_CONTROL_REG 0x0
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#define SATA3_CTRL_SATA0_PD_OFFSET 6
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#define SATA3_CTRL_SATA0_PD_MASK (1 << SATA3_CTRL_SATA0_PD_OFFSET)
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#define SATA3_CTRL_SATA1_PD_OFFSET 14
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#define SATA3_CTRL_SATA1_PD_MASK (1 << SATA3_CTRL_SATA1_PD_OFFSET)
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#define SATA3_CTRL_SATA1_ENABLE_OFFSET 22
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#define SATA3_CTRL_SATA1_ENABLE_MASK (1 << SATA3_CTRL_SATA1_ENABLE_OFFSET)
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#define SATA3_CTRL_SATA_SSU_OFFSET 23
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#define SATA3_CTRL_SATA_SSU_MASK (1 << SATA3_CTRL_SATA_SSU_OFFSET)
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#define SATA_MBUS_SIZE_SELECT_REG 0x4
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#define SATA_MBUS_REGRET_EN_OFFSET 7
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#define SATA_MBUS_REGRET_EN_MASK (0x1 << SATA_MBUS_REGRET_EN_OFFSET)
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#endif /* _SATA_H_ */
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