Marek Vasut b6055945d6 ARM: dts: stm32: Adjust PLL4 settings on AV96 again ... PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the 50 MHz generated from PLL4Q cannot be divided well enough to produce accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz, which is in tolerance for the SDMMC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Gerald Baeza <gerald.baeza@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>		2020-09-09 15:02:23 +02:00
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arc	board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo	2020-08-06 14:26:35 -04:00
arm	ARM: dts: stm32: Adjust PLL4 settings on AV96 again	2020-09-09 15:02:23 +02:00
m68k	board_f: m68k: Factor out m68k-specific bdinfo setup	2020-08-06 14:26:35 -04:00
microblaze	efi_loader: use CONFIG_STACK_SIZE in the UEFI sub-system	2020-08-01 11:58:23 +02:00
mips	- doc: fix qemu-mips build instructions	2020-08-04 11:07:16 -04:00
nds32	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
nios2	cpu: Convert the methods to use a const udevice *	2020-07-25 14:46:57 -06:00
powerpc	board_f: ppc: Factor out ppc-specific bdinfo setup	2020-08-06 14:26:35 -04:00
riscv	cmd: provide command sbi	2020-08-25 09:34:47 +08:00
sandbox	pci: pci-uclass: Add multi entry support for memory regions	2020-08-25 08:01:16 +02:00
sh	sh: r2dplus: Add SCIF1 to the basic DT	2020-08-02 19:58:27 +02:00
x86	x86: Drop nhlt_serialise()	2020-09-01 17:00:28 +08:00
xtensa	board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo	2020-08-06 14:26:35 -04:00
.gitignore
Kconfig	arc: Kconfig: Add missing DM dependency	2020-08-27 11:26:58 -04:00
u-boot-elf.lds	arch: Add explicit linker script for u-boot-elf	2020-04-03 11:52:55 -04:00