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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-27 04:18:51 +09:00
![Samuel Holland](/assets/img/avatar_default.png)
Import updated device trees from Linux tag v5.9. This picks up new hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI files for the Pinebook and the Teres-I, since the ANX6345 bridge is now supported upstream. A couple of headers needed updates for recently-added hardware support. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
383 lines
6.7 KiB
Plaintext
383 lines
6.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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// Copyright (c) 2016 ARM Ltd.
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/dts-v1/;
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#include "sun50i-a64.dtsi"
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#include "sun50i-a64-cpu-opp.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "BananaPi-M64";
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compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
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aliases {
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ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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hdmi-connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pwr-led {
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label = "bananapi-m64:red:pwr";
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gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
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default-state = "on";
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};
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green {
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label = "bananapi-m64:green:user";
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gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
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};
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blue {
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label = "bananapi-m64:blue:user";
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gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
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};
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
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clocks = <&rtc 1>;
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clock-names = "ext_clock";
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};
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};
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&codec {
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status = "okay";
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};
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&codec_analog {
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cpvdd-supply = <®_eldo1>;
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <®_dcdc2>;
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};
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&cpu1 {
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cpu-supply = <®_dcdc2>;
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};
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&cpu2 {
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cpu-supply = <®_dcdc2>;
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};
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&cpu3 {
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cpu-supply = <®_dcdc2>;
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};
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&dai {
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status = "okay";
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};
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&de {
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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phy-mode = "rgmii";
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phy-handle = <&ext_rgmii_phy>;
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phy-supply = <®_dc1sw>;
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status = "okay";
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};
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&hdmi {
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hvcc-supply = <®_dldo1>;
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status = "okay";
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&i2c1 {
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status = "okay";
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};
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&i2c1_pins {
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bias-pull-up;
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};
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&mdio {
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_dcdc1>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
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disable-wp;
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bus-width = <4>;
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <®_dldo2>;
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vqmmc-supply = <®_dldo4>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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interrupt-parent = <&r_pio>;
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interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
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interrupt-names = "host-wake";
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&r_rsb {
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status = "okay";
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axp803: pmic@3a3 {
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compatible = "x-powers,axp803";
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reg = <0x3a3>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
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};
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};
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#include "axp803.dtsi"
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&ac_power_supply {
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status = "okay";
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};
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&battery_power_supply {
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status = "okay";
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};
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®_aldo1 {
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/*
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* This regulator also drives the PE pingroup GPIOs,
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* which also controls two LEDs.
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*/
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regulator-always-on;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-name = "afvcc-csi";
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};
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®_aldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-pl";
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};
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®_aldo3 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-pll-avcc";
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};
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®_dc1sw {
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/*
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* This regulator also indirectly drives the PD pingroup GPIOs,
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* which also controls the power LED.
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*/
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regulator-always-on;
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regulator-name = "vcc-phy";
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};
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®_dcdc1 {
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3";
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};
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®_dcdc2 {
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regulator-always-on;
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regulator-min-microvolt = <1040000>;
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regulator-max-microvolt = <1300000>;
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regulator-name = "vdd-cpux";
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};
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/* DCDC3 is polyphased with DCDC2 */
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®_dcdc5 {
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regulator-always-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vcc-dram";
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};
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®_dcdc6 {
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-sys";
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};
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®_dldo1 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-hdmi-dsi";
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};
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®_dldo2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi";
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};
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®_dldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-io";
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};
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®_drivevbus {
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regulator-name = "usb0-vbus";
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status = "okay";
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};
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®_eldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "cpvdd";
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};
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®_fldo1 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vcc-1v2-hsic";
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};
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/*
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* The A64 chip cannot work without this regulator off, although
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* it seems to be only driving the AR100 core.
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* Maybe we don't still know well about CPUs domain.
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*/
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®_fldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpus";
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};
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®_rtc_ldo {
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regulator-name = "vcc-rtc";
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};
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&simplefb_hdmi {
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vcc-hdmi-supply = <®_dldo1>;
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};
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&sound {
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status = "okay";
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simple-audio-card,widgets = "Headphone", "Headphone Jack",
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"Microphone", "Microphone Jack",
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"Microphone", "Onboard Microphone";
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simple-audio-card,routing =
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"Left DAC", "AIF1 Slot 0 Left",
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"Right DAC", "AIF1 Slot 0 Right",
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"AIF1 Slot 0 Left ADC", "Left ADC",
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"AIF1 Slot 0 Right ADC", "Right ADC",
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"Headphone Jack", "HP",
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"MIC2", "Microphone Jack",
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"Onboard Microphone", "MBIAS",
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"MIC1", "Onboard Microphone";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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clocks = <&rtc 1>;
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clock-names = "lpo";
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vbat-supply = <®_dldo2>;
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vddio-supply = <®_dldo4>;
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device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
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host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
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shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
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};
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};
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&usb_otg {
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dr_mode = "otg";
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status = "okay";
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};
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&usb_power_supply {
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status = "okay";
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};
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&usbphy {
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usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
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usb0_vbus_power-supply = <&usb_power_supply>;
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usb0_vbus-supply = <®_drivevbus>;
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status = "okay";
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};
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