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![Suman Anna](/assets/img/avatar_default.png)
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. One R5F cluster is present within the MCU domain (MCU_R5FSS0), and the other one is present within the MAIN domain (MAIN_R5FSS0). Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory. Add the DT node for the MAIN domain R5F cluster/subsystem, the two R5F cores are added as child nodes to the main cluster/subsystem node. The cluster is configured to run in Split-mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Signed-off-by: Suman Anna <s-anna@ti.com>
203 lines
4.2 KiB
Plaintext
203 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-j7200-som-p0.dtsi"
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/ {
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chosen {
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stdout-path = "serial2:115200n8";
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bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
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};
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aliases {
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remoteproc0 = &mcu_r5fss0_core0;
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remoteproc1 = &mcu_r5fss0_core1;
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remoteproc2 = &main_r5fss0_core0;
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remoteproc3 = &main_r5fss0_core1;
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};
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};
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&wkup_pmx0 {
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wkup_i2c0_pins_default: wkup-i2c0-pins-default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
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J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
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>;
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};
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wkup_gpio_pins_default: wkup-gpio-pins-default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
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>;
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};
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mcu_cpsw_pins_default: mcu_cpsw_pins_default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
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J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
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J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
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J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
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J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
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J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
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J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
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J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
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J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
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J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
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J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
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J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
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>;
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};
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mcu_mdio_pins_default: mcu_mdio1_pins_default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
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J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
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>;
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};
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};
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&main_pmx0 {
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
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J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
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>;
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};
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main_usbss0_pins_default: main_usbss0_pins_default {
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pinctrl-single,pins = <
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J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
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>;
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};
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};
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&wkup_uart0 {
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/* Wakeup UART is used by System firmware */
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status = "disabled";
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};
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&main_uart0 {
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power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
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};
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&main_uart2 {
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/* MAIN UART 2 is used by R5F firmware */
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status = "disabled";
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};
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&main_uart3 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart4 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart5 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart6 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart7 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart8 {
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/* UART not brought out */
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status = "disabled";
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};
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&main_uart9 {
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/* UART not brought out */
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status = "disabled";
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};
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&wkup_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_i2c0_pins_default>;
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clock-frequency = <400000>;
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};
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&main_sdhci0 {
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/* eMMC */
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non-removable;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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&main_sdhci1 {
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/* SD card */
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ti,driver-strength-ohm = <50>;
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disable-wp;
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no-1-8-v;
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sdhci-caps-mask = <0x8000000F 0x0>;
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};
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&main_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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exp1: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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exp2: gpio@22 {
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compatible = "ti,tca6424";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&usbss0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_usbss0_pins_default>;
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ti,vbus-divider;
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ti,usb2-only;
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};
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&usb0 {
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dr_mode = "otg";
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maximum-speed = "high-speed";
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};
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&wkup_gpio0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_gpio_pins_default>;
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};
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&mcu_cpsw {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
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};
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&davinci_mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&phy0>;
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};
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