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https://github.com/brain-hackers/u-boot-brain
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![Franklin S. Cooper Jr](/assets/img/avatar_default.png)
* Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
/*
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* board.h
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*
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* TI AM437x boards information header
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* Derived from AM335x board.
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*
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* Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#include <asm/arch/omap.h>
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static char *const am43xx_board_name = (char *)AM4372_BOARD_NAME_START;
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static char *const am43xx_board_rev = (char *)AM4372_BOARD_VERSION_START;
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/*
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* TI AM437x EVMs define a system EEPROM that defines certain sub-fields.
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* We use these fields to in turn see what board we are on, and what
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* that might require us to set or not set.
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*/
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#define HDR_NO_OF_MAC_ADDR 3
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#define HDR_ETH_ALEN 6
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#define HDR_NAME_LEN 8
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#define DEV_ATTR_MAX_OFFSET 5
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#define DEV_ATTR_MIN_OFFSET 0
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struct am43xx_board_id {
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unsigned int magic;
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char name[HDR_NAME_LEN];
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char version[4];
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char serial[12];
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char config[32];
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char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
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};
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static inline int board_is_eposevm(void)
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{
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return !strncmp(am43xx_board_name, "AM43EPOS", HDR_NAME_LEN);
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}
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static inline int board_is_gpevm(void)
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{
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return !strncmp(am43xx_board_name, "AM43__GP", HDR_NAME_LEN);
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}
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static inline int board_is_sk(void)
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{
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return !strncmp(am43xx_board_name, "AM43__SK", HDR_NAME_LEN);
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}
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static inline int board_is_evm_14_or_later(void)
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{
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return (board_is_gpevm() && strncmp("1.4", am43xx_board_rev, 3) <= 0);
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}
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static inline int board_is_evm_12_or_later(void)
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{
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return (board_is_gpevm() && strncmp("1.2", am43xx_board_rev, 3) <= 0);
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}
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void enable_uart0_pin_mux(void);
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void enable_board_pin_mux(void);
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void enable_i2c0_pin_mux(void);
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#endif
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